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Unverified Commit 3a4bf922 authored by Jon Lin's avatar Jon Lin Committed by Mark Brown
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spi: rockchip: Preset cs-high and clk polarity in setup progress



After power up, the cs and clock is in default status, and the cs-high
and clock polarity dts property configuration will take no effect until
the calling of rockchip_spi_config in the first transmission.
So preset them to make sure a correct voltage before the first
transmission coming.

Signed-off-by: default avatarJon Lin <jon.lin@rock-chips.com>
Link: https://lore.kernel.org/r/20220216014028.8123-5-jon.lin@rock-chips.com


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 869f2c94
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