Commit 3d61a1f8 authored by Daniel Machon's avatar Daniel Machon Committed by Vinod Koul
Browse files

phy: sparx5-serdes: configure optimal quiet mode for serdes lanes 



All the serdes lanes of the sparx5 will transition between normal mode
and quiet mode, depending on activity. Make sure that the quiet mode is
configured optimally for all lanes initially. Although not much, this
will save a small amount of power.

Signed-off-by: default avatarDaniel Machon <daniel.machon@microchip.com>
Link: https://lore.kernel.org/r/20230417180335.2787494-3-daniel.machon@microchip.com


Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
parent 86c2cfb1

drivers/phy/microchip/sparx5_serdes.c

+31 −1
Original line number Diff line number Diff line
@@ -26,6 +26,9 @@ 
#define SPX5_SERDES_10G_START 13

#define SPX5_SERDES_25G_START 25



/* Optimal power settings from GUC */

#define SPX5_SERDES_QUIET_MODE_VAL 0x01ef4e0c



enum sparx5_10g28cmu_mode {

	SPX5_SD10G28_CMU_MAIN = 0,

	SPX5_SD10G28_CMU_AUX1 = 1,
@@ -1899,7 +1902,7 @@ static int sparx5_sd10g28_config(struct sparx5_serdes_macro *macro, bool reset) 
static int sparx5_serdes_power_save(struct sparx5_serdes_macro *macro, u32 pwdn)

{

	struct sparx5_serdes_private *priv = macro->priv;

	void __iomem *sd_inst;

	void __iomem *sd_inst, *sd_lane_inst;



	if (macro->serdestype == SPX5_SDT_6G)

		sd_inst = sdx5_inst_get(priv, TARGET_SD6G_LANE, macro->stpidx);
@@ -1909,12 +1912,36 @@ static int sparx5_serdes_power_save(struct sparx5_serdes_macro *macro, u32 pwdn) 
		sd_inst = sdx5_inst_get(priv, TARGET_SD25G_LANE, macro->stpidx);



	if (macro->serdestype == SPX5_SDT_25G) {

		sd_lane_inst = sdx5_inst_get(priv, TARGET_SD_LANE_25G,

					     macro->stpidx);

		/* Take serdes out of reset */

		sdx5_inst_rmw(SD_LANE_25G_SD_LANE_CFG_EXT_CFG_RST_SET(0),

			      SD_LANE_25G_SD_LANE_CFG_EXT_CFG_RST, sd_lane_inst,

			      SD_LANE_25G_SD_LANE_CFG(0));



		/* Configure optimal settings for quiet mode */

		sdx5_inst_rmw(SD_LANE_25G_QUIET_MODE_6G_QUIET_MODE_SET(SPX5_SERDES_QUIET_MODE_VAL),

			      SD_LANE_25G_QUIET_MODE_6G_QUIET_MODE,

			      sd_lane_inst, SD_LANE_25G_QUIET_MODE_6G(0));



		sdx5_inst_rmw(SD25G_LANE_LANE_04_LN_CFG_PD_DRIVER_SET(pwdn),

			      SD25G_LANE_LANE_04_LN_CFG_PD_DRIVER,

			      sd_inst,

			      SD25G_LANE_LANE_04(0));

	} else {

		/* 6G and 10G */

		sd_lane_inst = sdx5_inst_get(priv, TARGET_SD_LANE, macro->sidx);



		/* Take serdes out of reset */

		sdx5_inst_rmw(SD_LANE_SD_LANE_CFG_EXT_CFG_RST_SET(0),

			      SD_LANE_SD_LANE_CFG_EXT_CFG_RST, sd_lane_inst,

			      SD_LANE_SD_LANE_CFG(0));



		/* Configure optimal settings for quiet mode */

		sdx5_inst_rmw(SD_LANE_QUIET_MODE_6G_QUIET_MODE_SET(SPX5_SERDES_QUIET_MODE_VAL),

			      SD_LANE_QUIET_MODE_6G_QUIET_MODE, sd_lane_inst,

			      SD_LANE_QUIET_MODE_6G(0));



		sdx5_inst_rmw(SD10G_LANE_LANE_06_CFG_PD_DRIVER_SET(pwdn),

			      SD10G_LANE_LANE_06_CFG_PD_DRIVER,

			      sd_inst,
@@ -2308,6 +2335,9 @@ static int sparx5_phy_create(struct sparx5_serdes_private *priv, 


	phy_set_drvdata(*phy, macro);



	/* Power off serdes by default */

	sparx5_serdes_power_off(*phy);



	return 0;

}