Commit 40835624 authored by Maíra Canal's avatar Maíra Canal Committed by Alex Deucher
Browse files

drm/amdgpu: Write masked value to control register 



On the dce_v6_0 and dce_v8_0 hpd tear down callback, the tmp variable
should be written into the control register instead of 0.

Reviewed-by: default avatarAndré Almeida <andrealmeid@igalia.com>
Signed-off-by: default avatarMaíra Canal <mairacanal@riseup.net>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent dc2b9c70

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

+1 −1
Original line number Diff line number Diff line
@@ -339,7 +339,7 @@ static void dce_v6_0_hpd_fini(struct amdgpu_device *adev) 


		tmp = RREG32(mmDC_HPD1_CONTROL + hpd_offsets[amdgpu_connector->hpd.hpd]);

		tmp &= ~DC_HPD1_CONTROL__DC_HPD1_EN_MASK;

		WREG32(mmDC_HPD1_CONTROL + hpd_offsets[amdgpu_connector->hpd.hpd], 0);

		WREG32(mmDC_HPD1_CONTROL + hpd_offsets[amdgpu_connector->hpd.hpd], tmp);



		amdgpu_irq_put(adev, &adev->hpd_irq, amdgpu_connector->hpd.hpd);

	}

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

+1 −1
Original line number Diff line number Diff line
@@ -333,7 +333,7 @@ static void dce_v8_0_hpd_fini(struct amdgpu_device *adev) 


		tmp = RREG32(mmDC_HPD1_CONTROL + hpd_offsets[amdgpu_connector->hpd.hpd]);

		tmp &= ~DC_HPD1_CONTROL__DC_HPD1_EN_MASK;

		WREG32(mmDC_HPD1_CONTROL + hpd_offsets[amdgpu_connector->hpd.hpd], 0);

		WREG32(mmDC_HPD1_CONTROL + hpd_offsets[amdgpu_connector->hpd.hpd], tmp);



		amdgpu_irq_put(adev, &adev->hpd_irq, amdgpu_connector->hpd.hpd);

	}