Commit 471178aa authored Jul 27, 2021 by Lad Prabhakar Committed by Geert Uytterhoeven Sep 20, 2021

arm64: dts: renesas: rzg2l-smarc: Add scif0 pins



Add scif0 pins in pinctrl node and update the scif0 node
to include pinctrl properties.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20210727112328.18809-5-prabhakar.mahadev-lad.rj@bp.renesas.com


Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

parent bcd5e517

arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi

+10 −0

Original line number	Diff line number	Diff line
		@@ -6,6 +6,7 @@
		*/

		#include <dt-bindings/gpio/gpio.h>
		#include <dt-bindings/pinctrl/rzg2l-pinctrl.h>

		/ {
		aliases {
		@@ -22,6 +23,15 @@ &extal_clk {
		clock-frequency = <24000000>;
		};

		&pinctrl {
		scif0_pins: scif0 {
		pinmux = <RZG2L_PORT_PINMUX(38, 0, 1)>, /* TxD */
		<RZG2L_PORT_PINMUX(38, 1, 1)>; /* RxD */
		};
		};

		&scif0 {
		pinctrl-0 = <&scif0_pins>;
		pinctrl-names = "default";
		status = "okay";
		};