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Commit 54647cd0 authored by Chuanhong Guo's avatar Chuanhong Guo Committed by Miquel Raynal
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mtd: spinand: gigadevice: add support for GD5FxGM7xExxG



Add support for:
 GD5F{1,2}GM7{U,R}ExxG
 GD5F4GM8{U,R}ExxG

These are new 27nm counterparts for the GD5FxGQ4 chips from GigaDevice
with 8b/512b on-die ECC capability.
These chips (and currently supported GD5FxGQ5 chips) have QIO DTR
instruction for reading page cache. It isn't added in this patch because
I don't have a DTR spi controller for testing.

Signed-off-by: default avatarChuanhong Guo <gch981213@gmail.com>
Signed-off-by: default avatarMiquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20220320100001.247905-6-gch981213@gmail.com
parent 194ec04b
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