Commit 56d651e8 authored by Yoshihiro Kaneko's avatar Yoshihiro Kaneko Committed by Geert Uytterhoeven
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arm64: dts: renesas: r8a77995: Fix register range of display node



Since the R8A77995 SoC uses DU{0,1}, the range from the base address to
the 0x4000 address is used.
This patch fixed it.

Fixes: 18f1a773 ("arm64: dts: renesas: r8a77995: add DU support")
Signed-off-by: default avatarYoshihiro Kaneko <ykaneko0929@gmail.com>
Reviewed-by: default avatarSimon Horman <horms+renesas@verge.net.au>
Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent 3ed1db90
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+1 −1
Original line number Diff line number Diff line
@@ -995,7 +995,7 @@ fcpvd1: fcp@fea2f000 {

		du: display@feb00000 {
			compatible = "renesas,du-r8a77995";
			reg = <0 0xfeb00000 0 0x80000>;
			reg = <0 0xfeb00000 0 0x40000>;
			interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 724>,