Commit 6288b4ce authored by Suzuki K Poulose's avatar Suzuki K Poulose Committed by Greg Kroah-Hartman
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coresight: etm4x: Fix accesses to TRCPROCSELR



TRCPROCSELR is not implemented if the TRCIDR3.NUMPROC == 0. Skip
accessing the register in such cases.

Cc: stable@vger.kernel.org
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Mike Leach <mike.leach@linaro.org>
Signed-off-by: default avatarSuzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: default avatarMathieu Poirier <mathieu.poirier@linaro.org>
Link: https://lore.kernel.org/r/20201127175256.1092685-7-mathieu.poirier@linaro.org


Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 4e218727
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+6 −4
Original line number Diff line number Diff line
@@ -124,7 +124,7 @@ static int etm4_enable_hw(struct etmv4_drvdata *drvdata)
	if (coresight_timeout(drvdata->base, TRCSTATR, TRCSTATR_IDLE_BIT, 1))
		dev_err(etm_dev,
			"timeout while waiting for Idle Trace Status\n");

	if (drvdata->nr_pe)
		writel_relaxed(config->pe_sel, drvdata->base + TRCPROCSELR);
	writel_relaxed(config->cfg, drvdata->base + TRCCONFIGR);
	/* nothing specific implemented */
@@ -1185,6 +1185,7 @@ static int etm4_cpu_save(struct etmv4_drvdata *drvdata)
	state = drvdata->save_state;

	state->trcprgctlr = readl(drvdata->base + TRCPRGCTLR);
	if (drvdata->nr_pe)
		state->trcprocselr = readl(drvdata->base + TRCPROCSELR);
	state->trcconfigr = readl(drvdata->base + TRCCONFIGR);
	state->trcauxctlr = readl(drvdata->base + TRCAUXCTLR);
@@ -1292,6 +1293,7 @@ static void etm4_cpu_restore(struct etmv4_drvdata *drvdata)
	writel_relaxed(state->trcclaimset, drvdata->base + TRCCLAIMSET);

	writel_relaxed(state->trcprgctlr, drvdata->base + TRCPRGCTLR);
	if (drvdata->nr_pe)
		writel_relaxed(state->trcprocselr, drvdata->base + TRCPROCSELR);
	writel_relaxed(state->trcconfigr, drvdata->base + TRCCONFIGR);
	writel_relaxed(state->trcauxctlr, drvdata->base + TRCAUXCTLR);