Commit 94034b30 authored by Jiadong Zhu's avatar Jiadong Zhu Committed by Alex Deucher
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drm/amdgpu: Program gds backup address as zero if no gds allocated 



It is firmware requirement to set gds_backup_addrlo and gds_backup_addrhi
of DE meta both zero if no gds partition is allocated for the frame.

Signed-off-by: default avatarJiadong Zhu <Jiadong.Zhu@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org # 6.3.x
parent 1dbcf770

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

+8 −5
Original line number Diff line number Diff line
@@ -755,7 +755,7 @@ static void gfx_v9_0_set_rlc_funcs(struct amdgpu_device *adev); 
static int gfx_v9_0_get_cu_info(struct amdgpu_device *adev,

				struct amdgpu_cu_info *cu_info);

static uint64_t gfx_v9_0_get_gpu_clock_counter(struct amdgpu_device *adev);

static void gfx_v9_0_ring_emit_de_meta(struct amdgpu_ring *ring, bool resume);

static void gfx_v9_0_ring_emit_de_meta(struct amdgpu_ring *ring, bool resume, bool usegds);

static u64 gfx_v9_0_ring_get_rptr_compute(struct amdgpu_ring *ring);

static void gfx_v9_0_query_ras_error_count(struct amdgpu_device *adev,

					  void *ras_error_status);
@@ -5127,7 +5127,8 @@ static void gfx_v9_0_ring_emit_ib_gfx(struct amdgpu_ring *ring, 
			gfx_v9_0_ring_emit_de_meta(ring,

						   (!amdgpu_sriov_vf(ring->adev) &&

						   flags & AMDGPU_IB_PREEMPTED) ?

						   true : false);

						   true : false,

						   job->gds_size > 0 && job->gds_base != 0);

	}



	amdgpu_ring_write(ring, header);
@@ -5402,7 +5403,7 @@ static int gfx_v9_0_ring_preempt_ib(struct amdgpu_ring *ring) 
	return r;

}



static void gfx_v9_0_ring_emit_de_meta(struct amdgpu_ring *ring, bool resume)

static void gfx_v9_0_ring_emit_de_meta(struct amdgpu_ring *ring, bool resume, bool usegds)

{

	struct amdgpu_device *adev = ring->adev;

	struct v9_de_ib_state de_payload = {0};
@@ -5433,8 +5434,10 @@ static void gfx_v9_0_ring_emit_de_meta(struct amdgpu_ring *ring, bool resume) 
				 PAGE_SIZE);

	}



	if (usegds) {

		de_payload.gds_backup_addrlo = lower_32_bits(gds_addr);

		de_payload.gds_backup_addrhi = upper_32_bits(gds_addr);

	}



	cnt = (sizeof(de_payload) >> 2) + 4 - 2;

	amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, cnt));