Commit 958afce9 authored by Alex Deucher's avatar Alex Deucher
Browse files

drm/amdgpu: restore original stable pstate on ctx fini 



Save the original stable pstate on ctx init and restore
it on ctx fini so that we restore a manually selected
stable pstate on ctx exit.

v2: fix init order (Alex)
v3: don't add new variable to ctx struct (Evan)

Fixes: c65b364c ("drm/amdgpu/ctx: only reset stable pstate if the user changed it (v2)")
Reviewed-by: default avatarEvan Quan <evan.quan@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 98a90f1f

drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c

+33 −27
Original line number Diff line number Diff line
@@ -272,32 +272,6 @@ static ktime_t amdgpu_ctx_fini_entity(struct amdgpu_ctx_entity *entity) 
	return res;

}



static int amdgpu_ctx_init(struct amdgpu_ctx_mgr *mgr, int32_t priority,

			   struct drm_file *filp, struct amdgpu_ctx *ctx)

{

	int r;



	r = amdgpu_ctx_priority_permit(filp, priority);

	if (r)

		return r;



	memset(ctx, 0, sizeof(*ctx));



	kref_init(&ctx->refcount);

	ctx->mgr = mgr;

	spin_lock_init(&ctx->ring_lock);

	mutex_init(&ctx->lock);



	ctx->reset_counter = atomic_read(&mgr->adev->gpu_reset_counter);

	ctx->reset_counter_query = ctx->reset_counter;

	ctx->vram_lost_counter = atomic_read(&mgr->adev->vram_lost_counter);

	ctx->init_priority = priority;

	ctx->override_priority = AMDGPU_CTX_PRIORITY_UNSET;

	ctx->stable_pstate = AMDGPU_CTX_STABLE_PSTATE_NONE;



	return 0;

}



static int amdgpu_ctx_get_stable_pstate(struct amdgpu_ctx *ctx,

					u32 *stable_pstate)

{
@@ -326,6 +300,38 @@ static int amdgpu_ctx_get_stable_pstate(struct amdgpu_ctx *ctx, 
	return 0;

}



static int amdgpu_ctx_init(struct amdgpu_ctx_mgr *mgr, int32_t priority,

			   struct drm_file *filp, struct amdgpu_ctx *ctx)

{

	u32 current_stable_pstate;

	int r;



	r = amdgpu_ctx_priority_permit(filp, priority);

	if (r)

		return r;



	memset(ctx, 0, sizeof(*ctx));



	kref_init(&ctx->refcount);

	ctx->mgr = mgr;

	spin_lock_init(&ctx->ring_lock);

	mutex_init(&ctx->lock);



	ctx->reset_counter = atomic_read(&mgr->adev->gpu_reset_counter);

	ctx->reset_counter_query = ctx->reset_counter;

	ctx->vram_lost_counter = atomic_read(&mgr->adev->vram_lost_counter);

	ctx->init_priority = priority;

	ctx->override_priority = AMDGPU_CTX_PRIORITY_UNSET;



	r = amdgpu_ctx_get_stable_pstate(ctx, &current_stable_pstate);

	if (r)

		return r;



	ctx->stable_pstate = current_stable_pstate;



	return 0;

}



static int amdgpu_ctx_set_stable_pstate(struct amdgpu_ctx *ctx,

					u32 stable_pstate)

{
@@ -397,7 +403,7 @@ static void amdgpu_ctx_fini(struct kref *ref) 
	}



	if (drm_dev_enter(&adev->ddev, &idx)) {

		amdgpu_ctx_set_stable_pstate(ctx, AMDGPU_CTX_STABLE_PSTATE_NONE);

		amdgpu_ctx_set_stable_pstate(ctx, ctx->stable_pstate);

		drm_dev_exit(idx);

	}