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Commit adc0e6ab authored by Jack Xiao's avatar Jack Xiao Committed by Alex Deucher
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drm/amdgpu/mes: add mes register access interface



Add mes register access routines:
1. read register
2. write register
3. wait register
4. write and wait register

Signed-off-by: default avatarJack Xiao <Jack.Xiao@amd.com>
Reviewed-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 7d4705b3
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