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Commit b6ca556c authored by Marc Zyngier's avatar Marc Zyngier
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irqchip/apple-aic: Advertise some level of vGICv3 compatibility 



The CPUs in the Apple M1 SoC partially implement a virtual GICv3
CPU interface, although one that is incapable of HW deactivation
of interrupts, nor masking the maintenance interrupt.

Advertise the support to KVM.

Signed-off-by: default avatarMarc Zyngier <maz@kernel.org>
parent 5f592296
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