Commit bae293e9 authored by Marek Vasut's avatar Marek Vasut Committed by Shawn Guo
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arm64: dts: imx8mp: Reorder clock to match fsl,imx6q-pcie.yaml



Reorder the PCIe clock in DT to match YAML DT schema. No functional change.

Signed-off-by: default avatarMarek Vasut <marex@denx.de>
Reviewed-by: default avatarRichard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 1a9629f7
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+3 −3
Original line number Diff line number Diff line
@@ -1275,9 +1275,9 @@ pcie: pcie@33800000 {
			reg = <0x33800000 0x400000>, <0x1ff00000 0x80000>;
			reg-names = "dbi", "config";
			clocks = <&clk IMX8MP_CLK_HSIO_ROOT>,
				 <&clk IMX8MP_CLK_PCIE_ROOT>,
				 <&clk IMX8MP_CLK_HSIO_AXI>;
			clock-names = "pcie", "pcie_aux", "pcie_bus";
				 <&clk IMX8MP_CLK_HSIO_AXI>,
				 <&clk IMX8MP_CLK_PCIE_ROOT>;
			clock-names = "pcie", "pcie_bus", "pcie_aux";
			assigned-clocks = <&clk IMX8MP_CLK_PCIE_AUX>;
			assigned-clock-rates = <10000000>;
			assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_50M>;