Commit d44f88da authored by Vincent Wan's avatar Vincent Wan Committed by Ulf Hansson
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mmc: sdhci-pci: enable the clear transfer mode register quirk for AMD sdhci 



This patch is to enable the quirk for AMD sdhci requiring transfer
mode register need to be cleared for commands without data

Signed-off-by: default avatarVincent Wan <vincent.wan@amd.com>
Signed-off-by: default avatarWan Zongshun <mcuos.com@gmail.com>
Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
parent 9b8ffea6

drivers/mmc/host/sdhci-pci.c

+26 −1
Original line number Diff line number Diff line
@@ -645,6 +645,23 @@ static const struct sdhci_pci_fixes sdhci_rtsx = { 
	.probe_slot	= rtsx_probe_slot,

};



static int amd_probe(struct sdhci_pci_chip *chip)

{

	struct pci_dev	*smbus_dev;



	smbus_dev = pci_get_device(PCI_VENDOR_ID_AMD,

			PCI_DEVICE_ID_AMD_HUDSON2_SMBUS, NULL);



	if (smbus_dev && (smbus_dev->revision < 0x51))

		chip->quirks2 |= SDHCI_QUIRK2_CLEAR_TRANSFERMODE_REG_BEFORE_CMD;



	return 0;

}



static const struct sdhci_pci_fixes sdhci_amd = {

	.probe		= amd_probe,

};



static const struct pci_device_id pci_ids[] = {

	{

		.vendor		= PCI_VENDOR_ID_RICOH,
@@ -1044,7 +1061,15 @@ static const struct pci_device_id pci_ids[] = { 
		.subdevice	= PCI_ANY_ID,

		.driver_data	= (kernel_ulong_t)&sdhci_o2,

	},



	{

		.vendor		= PCI_VENDOR_ID_AMD,

		.device		= PCI_ANY_ID,

		.class		= PCI_CLASS_SYSTEM_SDHCI << 8,

		.class_mask	= 0xFFFF00,

		.subvendor	= PCI_ANY_ID,

		.subdevice	= PCI_ANY_ID,

		.driver_data	= (kernel_ulong_t)&sdhci_amd,

	},

	{	/* Generic SD host controller */

		PCI_DEVICE_CLASS((PCI_CLASS_SYSTEM_SDHCI << 8), 0xFFFF00)

	},