Skip to content
Commit d798f2f2 authored by Alex Deucher's avatar Alex Deucher
Browse files

drm/radeon/dce8: properly handle interlaced timing



The register bits changed on DCE8 compared to previous
families.

Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 9e05fa1d
Loading
Loading
Loading
Loading
0% Loading or .
You are about to add 0 people to the discussion. Proceed with caution.
Please to comment