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Commit e0d7ce78 authored by Tony Cheng's avatar Tony Cheng Committed by Alex Deucher
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drm/amd/display: enable clock gating and dchubp power gating



also refactor to clean reduce loc to achieve same logic

Signed-off-by: default avatarTony Cheng <tony.cheng@amd.com>
Acked-by: default avatarHarry Wentland <Harry.Wentland@amd.com>
Reviewed-by: default avatarYongqiang Sun <yongqiang.sun@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent f33ad37f
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