Commit edd757d1 authored by Ben Skeggs's avatar Ben Skeggs
Browse files

drm/nouveau/sec2: initialise SW state for falcon from constructor 



This will allow us to register the falcon with ACR, and further customise
its behaviour by providing the nvkm_falcon_func structure directly.

Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent 7adc40c5

drivers/gpu/drm/nouveau/include/nvkm/engine/sec2.h

+2 −1
Original line number Diff line number Diff line
@@ -3,13 +3,14 @@ 
#define __NVKM_SEC2_H__

#define nvkm_sec2(p) container_of((p), struct nvkm_sec2, engine)

#include <core/engine.h>

#include <core/falcon.h>



struct nvkm_sec2 {

	const struct nvkm_sec2_func *func;

	struct nvkm_engine engine;

	struct nvkm_falcon falcon;

	u32 addr;



	struct nvkm_falcon *falcon;

	struct nvkm_msgqueue *queue;

	struct work_struct work;

};

drivers/gpu/drm/nouveau/nvkm/engine/sec2/base.c

+6 −19
Original line number Diff line number Diff line
@@ -24,7 +24,6 @@ 
#include <core/firmware.h>

#include <core/msgqueue.h>

#include <subdev/top.h>

#include <engine/falcon.h>



static void

nvkm_sec2_intr(struct nvkm_engine *engine)
@@ -62,22 +61,6 @@ nvkm_sec2_recv(struct work_struct *work) 
	nvkm_msgqueue_recv(sec2->queue);

}





static int

nvkm_sec2_oneinit(struct nvkm_engine *engine)

{

	struct nvkm_sec2 *sec2 = nvkm_sec2(engine);

	struct nvkm_subdev *subdev = &sec2->engine.subdev;



	if (!sec2->addr) {

		sec2->addr = nvkm_top_addr(subdev->device, subdev->index);

		if (WARN_ON(!sec2->addr))

			return -EINVAL;

	}



	return nvkm_falcon_v1_new(subdev, "SEC2", sec2->addr, &sec2->falcon);

}



static int

nvkm_sec2_fini(struct nvkm_engine *engine, bool suspend)

{
@@ -91,14 +74,13 @@ nvkm_sec2_dtor(struct nvkm_engine *engine) 
{

	struct nvkm_sec2 *sec2 = nvkm_sec2(engine);

	nvkm_msgqueue_del(&sec2->queue);

	nvkm_falcon_del(&sec2->falcon);

	nvkm_falcon_dtor(&sec2->falcon);

	return sec2;

}



static const struct nvkm_engine_func

nvkm_sec2 = {

	.dtor = nvkm_sec2_dtor,

	.oneinit = nvkm_sec2_oneinit,

	.fini = nvkm_sec2_fini,

	.intr = nvkm_sec2_intr,

};
@@ -124,6 +106,11 @@ nvkm_sec2_new_(const struct nvkm_sec2_fwif *fwif, struct nvkm_device *device, 


	sec2->func = fwif->func;



	ret = nvkm_falcon_ctor(sec2->func->flcn, &sec2->engine.subdev,

			       nvkm_subdev_name[index], addr, &sec2->falcon);

	if (ret)

		return ret;



	INIT_WORK(&sec2->work, nvkm_sec2_recv);

	return 0;

};

drivers/gpu/drm/nouveau/nvkm/engine/sec2/gp102.c

+17 −1
Original line number Diff line number Diff line
@@ -26,8 +26,24 @@ static const struct nvkm_acr_lsf_func 
gp102_sec2_acr_0 = {

};





static const struct nvkm_falcon_func

gp102_sec2_flcn = {

	.load_imem = nvkm_falcon_v1_load_imem,

	.load_dmem = nvkm_falcon_v1_load_dmem,

	.read_dmem = nvkm_falcon_v1_read_dmem,

	.bind_context = nvkm_falcon_v1_bind_context,

	.wait_for_halt = nvkm_falcon_v1_wait_for_halt,

	.clear_interrupt = nvkm_falcon_v1_clear_interrupt,

	.set_start_addr = nvkm_falcon_v1_set_start_addr,

	.start = nvkm_falcon_v1_start,

	.enable = nvkm_falcon_v1_enable,

	.disable = nvkm_falcon_v1_disable,

};



const struct nvkm_sec2_func

gp102_sec2 = {

	.flcn = &gp102_sec2_flcn,

};



MODULE_FIRMWARE("nvidia/gp102/sec2/desc.bin");
@@ -52,7 +68,7 @@ gp102_sec2_load(struct nvkm_sec2 *sec2, int ver, 
		const struct nvkm_sec2_fwif *fwif)

{

	return nvkm_acr_lsfw_load_sig_image_desc_v1(&sec2->engine.subdev,

						    sec2->falcon,

						    &sec2->falcon,

						    NVKM_ACR_LSF_SEC2, "sec2/",

						    ver, fwif->acr);

}

drivers/gpu/drm/nouveau/nvkm/engine/sec2/priv.h

+1 −0
Original line number Diff line number Diff line
@@ -4,6 +4,7 @@ 
#include <engine/sec2.h>



struct nvkm_sec2_func {

	const struct nvkm_falcon_func *flcn;

};



struct nvkm_sec2_fwif {

drivers/gpu/drm/nouveau/nvkm/engine/sec2/tu102.c

+15 −0
Original line number Diff line number Diff line
@@ -21,8 +21,23 @@ 
 */

#include "priv.h"



static const struct nvkm_falcon_func

tu102_sec2_flcn = {

	.load_imem = nvkm_falcon_v1_load_imem,

	.load_dmem = nvkm_falcon_v1_load_dmem,

	.read_dmem = nvkm_falcon_v1_read_dmem,

	.bind_context = nvkm_falcon_v1_bind_context,

	.wait_for_halt = nvkm_falcon_v1_wait_for_halt,

	.clear_interrupt = nvkm_falcon_v1_clear_interrupt,

	.set_start_addr = nvkm_falcon_v1_set_start_addr,

	.start = nvkm_falcon_v1_start,

	.enable = nvkm_falcon_v1_enable,

	.disable = nvkm_falcon_v1_disable,

};



static const struct nvkm_sec2_func

tu102_sec2 = {

	.flcn = &tu102_sec2_flcn,

};



static int