Commit f2603b22 authored by Suzuki K Poulose's avatar Suzuki K Poulose Committed by Greg Kroah-Hartman
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coresight: etm4x: Fix accesses to TRCCIDCTLR1 



The TRCCIDCTLR1 is only implemented if TRCIDR4.NUMCIDC > 4.
Don't touch the register if it is not implemented.

Cc: stable@vger.kernel.org
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Mike Leach <mike.leach@linaro.org>
Signed-off-by: default avatarSuzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: default avatarMathieu Poirier <mathieu.poirier@linaro.org>
Link: https://lore.kernel.org/r/20201127175256.1092685-5-mathieu.poirier@linaro.org


Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 93dd6440

drivers/hwtracing/coresight/coresight-etm4x-core.c

+6 −3
Original line number Diff line number Diff line
@@ -187,6 +187,7 @@ static int etm4_enable_hw(struct etmv4_drvdata *drvdata) 
		writeq_relaxed(config->ctxid_pid[i],

			       drvdata->base + TRCCIDCVRn(i));

	writel_relaxed(config->ctxid_mask0, drvdata->base + TRCCIDCCTLR0);

	if (drvdata->numcidc > 4)

		writel_relaxed(config->ctxid_mask1, drvdata->base + TRCCIDCCTLR1);



	for (i = 0; i < drvdata->numvmidc; i++)
@@ -1241,6 +1242,7 @@ static int etm4_cpu_save(struct etmv4_drvdata *drvdata) 
		state->trcvmidcvr[i] = readq(drvdata->base + TRCVMIDCVRn(i));



	state->trccidcctlr0 = readl(drvdata->base + TRCCIDCCTLR0);

	if (drvdata->numcidc > 4)

		state->trccidcctlr1 = readl(drvdata->base + TRCCIDCCTLR1);



	state->trcvmidcctlr0 = readl(drvdata->base + TRCVMIDCCTLR0);
@@ -1352,6 +1354,7 @@ static void etm4_cpu_restore(struct etmv4_drvdata *drvdata) 
			       drvdata->base + TRCVMIDCVRn(i));



	writel_relaxed(state->trccidcctlr0, drvdata->base + TRCCIDCCTLR0);

	if (drvdata->numcidc > 4)

		writel_relaxed(state->trccidcctlr1, drvdata->base + TRCCIDCCTLR1);



	writel_relaxed(state->trcvmidcctlr0, drvdata->base + TRCVMIDCCTLR0);