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Commit f2d2fe95 authored by Sagar Arun Kamble's avatar Sagar Arun Kamble Committed by Daniel Vetter
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drm/i915: WaRsDisableCoarsePowerGating



WaRsDisableCoarsePowerGating: Coarse Power Gating (CPG) needs to be
disabled for platforms prior to BXT B0 and SKL GT3/GT4 till E0.

v2: Added GT3/GT4 Check.

Change-Id: Ia3c4c16e050c88d3e259f601054875c812d69c3a
Signed-off-by: default avatarSagar Arun Kamble <sagar.a.kamble@intel.com>
Reviewed-by: default avatarAlex Dai <yu.dai@intel.com>
[danvet: Align continuation properly.]
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 7a58bad0
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