ARM: dts: aspeed: Add silicon id node

This register describes the silicon id and chip unique id. It varies
between CPU revisions, but is always part of the SCU.

Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Link: https://lore.kernel.org/r/20200921091644.133107-4-joel@jms.id.au


Signed-off-by: Joel Stanley <joel@jms.id.au>