Commits · 105c9e130e1df764ef2d41e2b35f51bba9c52617 · jan.koester / Linux · GitLab

Oct 21, 2020
- drm/i915: Introduce scaling filter related registers and bit fields · 105c9e13
  Pankaj Bharadiya authored Oct 20, 2020
  105c9e13
- drm: Introduce plane and CRTC scaling filter properties · 5c759eda
  Pankaj Bharadiya authored Oct 20, 2020
  5c759eda
Oct 20, 2020
- drm/i915/display: Rename pipe_timings to transcoder_timings · e7fc3f90
  Manasi Navare authored Oct 08, 2020
  e7fc3f90
- drm/i915: Sort ICL PCI IDs · 605f9c29
  Ville Syrjälä authored Jul 16, 2020
  605f9c29
- drm/i915: Sort CNL PCI IDs · 514dc424
  Ville Syrjälä authored Jul 16, 2020
  514dc424
- drm/i915: Sort CFL PCI IDs · 32d4ec9a
  Ville Syrjälä authored Jul 16, 2020
  32d4ec9a
- drm/i915: Sort CML PCI IDs · df3478af
  Ville Syrjälä authored Jul 16, 2020
  df3478af
- drm/i915: Sort KBL PCI IDs · cd988984
  Ville Syrjälä authored Jul 16, 2020
  cd988984
- drm/i915: Sort SKL PCI IDs · b04d36f7
  Ville Syrjälä authored Jul 16, 2020
  b04d36f7
- drm/i915: Sort HSW PCI IDs · 9c0b2d30
  Ville Syrjälä authored Jul 16, 2020
  9c0b2d30
- drm/i915: Ocd the HSW PCI ID hex numbers · 79033a0a
  Ville Syrjälä authored Jul 16, 2020
  79033a0a
- drm/i915: Try to fix the SKL GT3/4 vs. GT3e/4e comments · cfb3db8f
  Ville Syrjälä authored Jul 16, 2020
  cfb3db8f
- drm/i915: Add SKL GT1.5 PCI IDs · 03e39902
  Alexei Podtelezhnikov authored Jul 16, 2020
  03e39902
- drm/i915: Reclassify SKL 0x1923 and 0x1927 as ULT · 812f044d
  Alexei Podtelezhnikov authored Jul 16, 2020
  812f044d
- drm/i915: Reclassify SKL 0x192a as GT3 · 194909a3
  Alexei Podtelezhnikov authored Jul 16, 2020
  194909a3
- drm/i915: Update Haswell PCI IDs · 82e84284
  Alexei Podtelezhnikov authored Jul 16, 2020
  82e84284
- drm/i915: Sort the mess around ICP TC hotplugs regs · 2849e1af
  Ville Syrjälä authored Oct 06, 2020
  2849e1af
- drm/i915: Refactor .hpd_irq_setup() calls a bit · 5f51e78f
  Ville Syrjälä authored Oct 06, 2020
  5f51e78f
- drm/i915: Reorder hpd init vs. display resume · 4c8d4651
  Ville Syrjälä authored Oct 13, 2020
  4c8d4651
- drm/i915: s/intel_dp_sink_dpms/intel_dp_set_power/ · 0e634efd
  Ville Syrjälä authored Oct 16, 2020
  0e634efd
- drm/i915: Move the lspcon resume from .reset() to intel_dp_sink_dpms() · 0a5a7499
  Ville Syrjälä authored Oct 16, 2020
  0a5a7499
- drm/i915: Drop runtime-pm assert from vgpu io accessors · 0e65ce24
  Chris Wilson authored Aug 11, 2020
  0e65ce24
- drm/i915: Force VT'd workarounds when running as a guest OS · f566fdcd
  Chris Wilson authored Oct 19, 2020
  f566fdcd
- drm/i915/display/fbc: Implement WA 22010751166 · a21906ea
  José Roberto de Souza authored Oct 19, 2020
  a21906ea
- drm/i915/display: Program DBUF_CTL tracker state service · 359d0eff
  José Roberto de Souza authored Oct 19, 2020
  359d0eff
Oct 16, 2020
- drm/i915: Inline intel_dp_ycbcr420_config() · 0af0b841
  Ville Syrjälä authored Sep 24, 2020
  0af0b841
- drm/i915: Nuke lspcon_ycbcr420_config() · ebde5f89
  Ville Syrjälä authored Sep 24, 2020
  ebde5f89
- drm/i915: Nuke lspcon_downsampling · 06fa3284
  Ville Syrjälä authored Sep 24, 2020
  06fa3284
- drm/i915: Mark initial fb obj as WT on eLLC machines to avoid rcu lockup during fbdev init · 2c1e63ba
  Ville Syrjälä authored Oct 07, 2020
  2c1e63ba
- drm/i915: Apply WAC6entrylatency to kbl/cfl · 4d6bde58
  Ville Syrjälä authored Jul 16, 2020
  4d6bde58
- drm/i915/rkl: Add new cdclk table · 693260cf
  Matt Roper authored Oct 15, 2020
  693260cf
Oct 15, 2020
- drm/i915/dgfx: define llc and snooping behaviour · a4dbcf41
  Michel Thierry authored Oct 14, 2020
  a4dbcf41
- drm/i915/dg1: Update DMC_DEBUG register · 5bcc95ca
  Anshuman Gupta authored Oct 14, 2020
  5bcc95ca
- drm/i915/dg1: DG1 does not support DC6 · cbb6ea8c
  Anshuman Gupta authored Oct 14, 2020
  cbb6ea8c
- drm/i915/dg1: Add initial DG1 workarounds · da942750
  Stuart Summers authored Oct 14, 2020
  da942750
- drm/i915/dg1: Load DMC · bb4c3cf8
  Matt Atwood authored Oct 14, 2020
  bb4c3cf8
- drm/i915/dg1: Enable DPLL for DG1 · 0dac17af
  Lucas De Marchi authored Oct 14, 2020
  0dac17af
- drm/i915/dg1: Add and setup DPLLs for DG1 · b71b477d
  Aditya Swarup authored Oct 14, 2020
  b71b477d
- drm/i915/dg1: Add DPLL macros for DG1 · 049c651b
  Aditya Swarup authored Oct 14, 2020
  049c651b
- drm/i915/dg1: Add DG1 power wells · 240abb3c
  Lucas De Marchi authored Oct 14, 2020
  240abb3c