Commits · 1f9dfd7ac787ab8caa19a7bf463f617d97c9f66c · jan.koester / Linux · GitLab

Apr 12, 2017
- cs-2000-cp: keep Reserved bit on each register · 1f9dfd7a
  Kuninori Morimoto authored Apr 05, 2017
  1f9dfd7a
- clk: qcom: msm8996: Fix the vfe1 powerdomain name · a62ca337
  Rajendra Nayak authored Mar 23, 2017
  a62ca337
- clk: stm32f4: fix timeout management for pll and ready gate · ac03d8b3
  Gabriel Fernandez authored Mar 16, 2017
  ac03d8b3
- clk: iproc: Remove redundant check · d5a0945f
  Ray Jui authored Apr 05, 2017
  d5a0945f
- Merge tag 'v4.12-rockchip-clk1' of... · 55798360
  Michael Turquette authored Apr 12, 2017
  55798360
- Merge tag 'clk-renesas-for-v4.12-tag2' of... · 0d4ae360
  Michael Turquette authored Apr 12, 2017
  0d4ae360
- Merge branch 'clk-fixes' into clk-next · f37753e2
  Stephen Boyd authored Apr 04, 2017
  f37753e2
- clk: stm32f4: fix: exclude values 0 and 1 for PLLQ · ef189104
  Gabriel Fernandez authored Mar 16, 2017
  ef189104
- Merge branch 'for-4.12-ti-clk-cleanups' of https://github.com/t-kristo/linux-pm into clk-next · 4641d6a5
  Stephen Boyd authored Apr 04, 2017
  4641d6a5
- clk: hi6220: add debug APB clock · b0459491
  Leo Yan authored Mar 26, 2017
  b0459491
Mar 30, 2017
- clk: renesas: rcar-gen3-cpg: Add support for RCLK on R-Car H3 ES2.0 · bb195306
  Geert Uytterhoeven authored Mar 10, 2017
  bb195306
- clk: renesas: r8a7795: Add support for R-Car H3 ES2.0 · 5573d194
  Geert Uytterhoeven authored Sep 29, 2016
  5573d194
- clk: renesas: Add r8a7795 ES2.0 CPG Core Clock Definitions · 89f1b1c6
  Geert Uytterhoeven authored Sep 29, 2016
  89f1b1c6
- clk: renesas: cpg-mssr: Add support for fixing up clock tables · 48d0341e
  Geert Uytterhoeven authored Sep 29, 2016
  48d0341e
Mar 23, 2017
- Merge tag 'sunxi-clk-fixes-for-4.11' of... · 7f0b97d5
  Stephen Boyd authored Mar 23, 2017
  7f0b97d5
Mar 22, 2017
- clk: rockchip: add pll_wait_lock for pll_enable · 9be83448
  Elaine Zhang authored Feb 22, 2017
  9be83448
- clk: rockchip: rename RK1108 to RV1108 · 7e2a9035
  Andy Yan authored Mar 17, 2017
  7e2a9035
- dt-bindings: rk1108-cru: rename RK1108 to RV1108 · b61753a4
  Andy Yan authored Mar 17, 2017
  b61753a4
Mar 21, 2017
- clk: renesas: rcar-gen3: Add workaround for PLL0/2/4 errata on H3 ES1.0 · cecbe87d
  Geert Uytterhoeven authored Mar 10, 2017
  cecbe87d
- clk: renesas: rcar-gen3-cpg: Pass mode pins to rcar_gen3_cpg_init() · 5f3a432a
  Geert Uytterhoeven authored Mar 10, 2017
  5f3a432a
- clk: renesas: r8a7796: Reformat core clock table · c013fc7d
  Geert Uytterhoeven authored Nov 10, 2016
  c013fc7d
- clk: renesas: r8a7795: Reformat core clock table · 3c969cec
  Geert Uytterhoeven authored Nov 10, 2016
  3c969cec
- clk: renesas: r8a7796: Correct name of watchdog clock · 89aa58a3
  Geert Uytterhoeven authored Feb 28, 2017
  89aa58a3
- clk: renesas: r8a7795: Correct name of watchdog clock · 2122b56d
  Geert Uytterhoeven authored Feb 28, 2017
  2122b56d
- clk: renesas: r8a7795: Correct parent clock and sort order for Audio DMACs · a843ed3f
  Geert Uytterhoeven authored Feb 28, 2017
  a843ed3f
Mar 20, 2017
- clk: sunxi-ng: fix recalc_rate formula of NKMP clocks · b467e08a
  Icenowy Zheng authored Mar 18, 2017
  b467e08a
- clk: sunxi-ng: Fix div/mult settings for osc12M on A64 · fe686bab
  Philipp Tomsich authored Mar 15, 2017
  fe686bab
Mar 10, 2017
- clk: rockchip: mark some rk3368 core-clks as critical · 920c480a
  Elaine Zhang authored Mar 07, 2017
  920c480a
- clk: rockchip: export SCLK_TIMERXX id for timers on rk3368 · 4f060850
  Elaine Zhang authored Mar 07, 2017
  4f060850
- clk: rockchip: describe clk_gmac using the new muxgrf type on rk3328 · 9bb4db62
  Elaine Zhang authored Feb 06, 2017
  9bb4db62
- Merge branch 'v4.12-shared/clkids' into v4.12-clk/next · 4d00542b
  Heiko Stuebner authored Mar 10, 2017
  
  4d00542b
- clk: rockchip: add clock ids for timer10-15 of RK3368 SoCs · 710fbd76
  Elaine Zhang authored Mar 07, 2017
  710fbd76
- clk: rockchip: fix up rk3368 timer-ids · a4fa90d2
  Elaine Zhang authored Mar 07, 2017
  a4fa90d2
- clk: rockchip: add rk3328 clk_mac2io_ext ID · bdc7dd67
  Elaine Zhang authored Feb 06, 2017
  bdc7dd67
Mar 08, 2017
- clk: ti: convert to use proper register definition for all accesses · 6c0afb50
  Tero Kristo authored Feb 09, 2017
  6c0afb50
- clk: ti: dpll44xx: fix clksel register initialization · 473adbf4
  Tero Kristo authored Feb 09, 2017
  473adbf4
- clk: ti: gate: export gate_clk_ops locally · 9a00fa68
  Tero Kristo authored Feb 09, 2017
  9a00fa68
- clk: ti: divider: add driver internal API for parsing divider data · 4f6be565
  Tero Kristo authored Feb 09, 2017
  4f6be565
- clk: ti: divider: convert TI divider clock to use its own data representation · 6dbde947
  Tero Kristo authored Feb 09, 2017
  6dbde947
- clk: ti: mux: convert TI mux clock to use its internal data representation · d83bc5b6
  Tero Kristo authored Feb 09, 2017
  d83bc5b6