Commits · 3863f2a431f9bc01053f92f8b56852c121bf54e0 · jan.koester / Linux · GitLab

Feb 15, 2023
- Merge patch series "dt-bindings: Add a cpu-capacity property for RISC-V" · 3863f2a4
  Palmer Dabbelt authored Feb 14, 2023
  3863f2a4
- dt-bindings: riscv: add a capacity-dmips-mhz cpu property · 99199450
  Conor Dooley authored Jan 04, 2023
  99199450
- dt-bindings: arm: move cpu-capacity to a shared loation · 7d207831
  Conor Dooley authored Jan 04, 2023
  7d207831
- riscv: Fix Zbb alternative IDs · d5a7fab7
  Samuel Holland authored Feb 11, 2023
  d5a7fab7
- riscv: Fix early alternative patching · bfd6fc5d
  Samuel Holland authored Feb 11, 2023
  bfd6fc5d
- RISC-V: re-order Kconfig selects alphanumerically · 5f365c13
  Conor Dooley authored Dec 19, 2022
  5f365c13
- Documentation: riscv: fix insufficient list item indent · 2a5303b4
  Conor Dooley authored Jan 29, 2023
  2a5303b4
Feb 02, 2023
- Merge patch series "riscv: improve boot time isa extensions handling" · 9daca9a5
  Palmer Dabbelt authored Jan 31, 2023
  9daca9a5
Feb 01, 2023
- riscv: remove riscv_isa_ext_keys[] array and related usage · 03966594
  Jisheng Zhang authored Jan 29, 2023
  03966594
- riscv: KVM: Switch has_svinval() to riscv_has_extension_unlikely() · e8ad17d2
  Andrew Jones authored Jan 29, 2023
  e8ad17d2
- riscv: cpu_relax: switch to riscv_has_extension_likely() · 95bc69a4
  Jisheng Zhang authored Jan 29, 2023
  95bc69a4
- riscv: alternative: patch alternatives in the vDSO · cabfd146
  Jisheng Zhang authored Jan 29, 2023
  cabfd146
- riscv: switch to relative alternative entries · 8d23e94a
  Jisheng Zhang authored Jan 29, 2023
  8d23e94a
- riscv: module: Add ADD16 and SUB16 rela types · 1bc400ff
  Andrew Jones authored Jan 29, 2023
  1bc400ff
- riscv: module: move find_section to module.h · e0c267e0
  Jisheng Zhang authored Jan 29, 2023
  e0c267e0
- riscv: fpu: switch has_fpu() to riscv_has_extension_likely() · 702e6455
  Jisheng Zhang authored Jan 29, 2023
  702e6455
- riscv: introduce riscv_has_extension_[un]likely() · bdda5d55
  Jisheng Zhang authored Jan 29, 2023
  bdda5d55
- riscv: cpufeature: extend riscv_cpufeature_patch_func to all ISA extensions · 4bf88607
  Jisheng Zhang authored Jan 29, 2023
  4bf88607
- riscv: hwcap: make ISA extension ids can be used in asm · d8a3d8a7
  Jisheng Zhang authored Jan 29, 2023
  d8a3d8a7
- riscv: cpufeature: detect RISCV_ALTERNATIVES_EARLY_BOOT earlier · 191b27c7
  Jisheng Zhang authored Jan 29, 2023
  191b27c7
- riscv: move riscv_noncoherent_supported() out of ZICBOM probe · abcc445a
  Jisheng Zhang authored Jan 29, 2023
  abcc445a
Jan 31, 2023
- Merge patch series "Zbb string optimizations" · 75ab93a2
  Palmer Dabbelt authored Jan 31, 2023
  75ab93a2
- RISC-V: add zbb support to string functions · b6fcdb19
  Heiko Stuebner authored Jan 13, 2023
  b6fcdb19
- RISC-V: add infrastructure to allow different str* implementations · 56e0790c
  Heiko Stuebner authored Jan 13, 2023
  56e0790c
Jan 25, 2023
- riscv: Move call to init_cpu_topology() to later initialization stage · c1d61058
  Ley Foon Tan authored Jan 05, 2023
  c1d61058
- RISC-V: Fix do_notify_resume / do_work_pending prototype · 285b6a18
  Heiko Stuebner authored Jan 18, 2023
  285b6a18
- riscv/kprobe: Fix instruction simulation of JALR · ca025499
  Liao Chang authored Jan 16, 2023
  ca025499
- riscv: fix jal offsets in patched alternatives · 9d5567cc
  Jisheng Zhang authored Jan 13, 2023
  9d5567cc
- RISC-V: Kconfig: Remove trailing whitespace · 451fb217
  Geert Uytterhoeven authored Jan 11, 2023
  451fb217
- riscv: pgtable: Fixup comment for KERN_VIRT_SIZE · 6be1ff43
  Guo Ren authored Jan 10, 2023
  6be1ff43
Jan 20, 2023
- Merge patch series "Putting some basic order on isa extension lists" · 61a9b712
  Palmer Dabbelt authored Jan 19, 2023
  61a9b712
- riscv: fix -Wundef warning for CONFIG_RISCV_BOOT_SPINWAIT · 5b89c6f9
  Masahiro Yamada authored Jan 07, 2023
  5b89c6f9
- MAINTAINERS: add an IRC entry for RISC-V · 6d0cc1b1
  Conor Dooley authored Jan 06, 2023
  6d0cc1b1
- RISC-V: fix compile error from deduplicated __ALTERNATIVE_CFG_2 · d374a165
  Heiko Stuebner authored Jan 05, 2023
  d374a165
Jan 18, 2023
- Documentation: riscv: add a section about ISA string ordering in /proc/cpuinfo · f07b2b3f
  Conor Dooley authored Dec 05, 2022
  f07b2b3f
- RISC-V: resort all extensions in consistent orders · 80c200b3
  Conor Dooley authored Dec 05, 2022
  80c200b3
- RISC-V: clarify ISA string ordering rules in cpu.c · 99e2266f
  Conor Dooley authored Dec 05, 2022
  99e2266f
- Merge patch "RISC-V: fix incorrect type of ARCH_CANAAN_K210_DTB_SOURCE" · ae4d39f7
  Palmer Dabbelt authored Jan 17, 2023
  ae4d39f7
- RISC-V: fix incorrect type of ARCH_CANAAN_K210_DTB_SOURCE · 6fb4c593
  Conor Dooley authored Jan 11, 2023
  6fb4c593
Jan 06, 2023
- Merge patch series "riscv,isa fixups" · 6710e07f
  Palmer Dabbelt authored Jan 06, 2023
  6710e07f