Commits · 3b2cc8ab64bf5d643ac9a917653e0cb6fce32ffc · jan.koester / Linux · GitLab

Jun 13, 2014
- drm/i915/bdw: Do not write the Semaphore Sync Registers in GEN8+ · 3b2cc8ab
  Oscar Mateo authored Jun 11, 2014
  3b2cc8ab
- drm/i915: Prefault the entire object on first page fault · b90b91d8
  Chris Wilson authored Jun 10, 2014
  b90b91d8
- drm/i915: Fix VLV CRC reading. · a8aab8bd
  Rodrigo Vivi authored Jun 05, 2014
  a8aab8bd
- drm/i915: Update DRIVER_DATE to 20140606 · 75a91c97
  Daniel Vetter authored Jun 06, 2014
  75a91c97
- drm/i915: preserve user forcewake over system suspend/resume · 10018603
  Imre Deak authored Jun 06, 2014
  10018603
- drm/i915: fix possible refcount leak when resetting forcewake · 9e31c2a5
  Imre Deak authored Jun 06, 2014
  9e31c2a5
- drm/i915: Use %c in a format string for the pipe name · fdaf66de
  Damien Lespiau authored Jun 06, 2014
  fdaf66de
- drm/i915/bdw: Add Broadwell support for debugfs rps freq info · daa3afb2
  Tom O'Rourke authored May 30, 2014
  daa3afb2
- drm/i915: Don't get hw state from DVO chip unless DVO is enabled · f417c11b
  Ville Syrjälä authored Jun 05, 2014
  f417c11b
- drm/i915: Use named initializers for gmch wm params · e0f0273e
  Ville Syrjälä authored Jun 05, 2014
  e0f0273e
- drm/i915: Use the .release hook to drop the stolen drm_mm tracking · ef0cf27c
  Chris Wilson authored Jun 06, 2014
  ef0cf27c
- drm/i915: Only wait one vblank when disabling crc if the pipe is on · a33d7105
  Daniel Vetter authored Jun 06, 2014
  a33d7105
Jun 11, 2014
- drm/i915: Add #defines for short/long pulse on gmch platforms · a211b497
  Daniel Vetter authored Jun 05, 2014
  a211b497
- drm/i915: Simplify intel_gpu_reset · 542c184f
  Robert Beckett authored Jun 03, 2014
  542c184f
- drm/i915: Drop unused lut tables from intel_plane · d5ec2639
  Matt Roper authored Jun 02, 2014
  d5ec2639
- drm/i915: runtime PM support for DPMS · 0e572fe7
  Daniel Vetter authored Apr 24, 2014
  0e572fe7
- drm/i915: enable PPGTT on VLV · 7365fb78
  Jesse Barnes authored May 29, 2014
  7365fb78
- drm/i915: Use transcoder as index to MIPI regs · a2560a66
  Shashank Sharma authored Jun 02, 2014
  a2560a66
- drm/i915: Change Mipi register definitions · 4ad83e94
  Shashank Sharma authored Jun 02, 2014
  4ad83e94
- drivers/gpu/drm/i915/dma: style fixes · 1a5036bf
  Robin Schroer authored Jun 02, 2014
  1a5036bf
- drm/i915: use shmem helpers if possible · f461d1be
  David Rheinsberg authored May 25, 2014
  f461d1be
- drm/i915: Intel-specific primary plane handling (v8) · 465c120c
  Matt Roper authored May 29, 2014
  465c120c
- drm/i915: don't force full modeset if primary plane is disabled (v2) · 3b150f08
  Matt Roper authored May 29, 2014
  3b150f08
- drm/i915: Drop locking around fbdev-fb in debugfs · 75e2acf2
  Daniel Vetter authored May 29, 2014
  75e2acf2
- drm/i915: Fix context locking in debugfs · f3d28878
  Daniel Vetter authored May 29, 2014
  f3d28878
- drm/i915: Check for a NULL shared dpll before dereferencing · be19f0ff
  Chris Wilson authored May 28, 2014
  be19f0ff
- drm/i915: Make intel_dsi_init() return void · 4328633d
  Damien Lespiau authored May 28, 2014
  4328633d
- drm/i915: Fix checkpatch errors · b5fbcd98
  Shobhit Kumar authored May 27, 2014
  b5fbcd98
- drm/i915/chv: Handle video DIP registers on CHV · 2dcbc34d
  Ville Syrjälä authored Apr 09, 2014
  2dcbc34d
- drm/i915: Don't use pipe_offset stuff for DPLL registers · 2d401b17
  Ville Syrjälä authored Apr 09, 2014
  2d401b17
- drm/i915/chv: Force PHY clock buffers off after PLL disable · 61407f6d
  Ville Syrjälä authored May 27, 2014
  61407f6d
- drm/i915/chv: Force clock buffer enables · b9e5ac3c
  Ville Syrjälä authored May 27, 2014
  b9e5ac3c
- drm/i915/chv: Try to program the PHY used clock channel overrides · 9197c88b
  Ville Syrjälä authored Apr 09, 2014
  9197c88b
- drm/i915/chv: Freq(opcode) request for CHV. · 13a5660c
  Deepak S authored May 23, 2014
  13a5660c
- drm/i915/chv: Skip gen6_gt_check_fifodbg() on CHV · ab53c267
  Ville Syrjälä authored May 23, 2014
  ab53c267
- drm/i915/chv: CHV doesn't need WaRsForcewakeWaitTC0 · 3f4e3495
  Ville Syrjälä authored May 23, 2014
  3f4e3495
- drm/i915/chv: Enable RPS (Turbo) for Cherryview · 2b6b3a09
  Deepak S authored May 27, 2014
  2b6b3a09
- drm/i915: Keep vblank interrupts enabled while enabling/disabling planes · f98551ae
  Ville Syrjälä authored May 22, 2014
  f98551ae
- drm/i915/chv: Added CHV specific register read and write and Streamline CHV forcewake stuff · 1938e59a
  Deepak S authored May 23, 2014
  1938e59a
- drm/i915/chv: Enable Render Standby (RC6) for Cherryview · 38807746
  Deepak S authored May 23, 2014
  38807746