Commits · 618e9ed98aed924a1fc664eb6522db4a5e927043 · jan.koester / Linux · GitLab

Mar 20, 2006
- [SPARC64]: Hypervisor TSB context switching. · 618e9ed9
  David S. Miller authored Feb 09, 2006
  618e9ed9
- [SPARC64]: Implement sun4v TSB miss handlers. · aa9143b9
  David S. Miller authored Feb 09, 2006
  aa9143b9
- [SPARC64]: kernel/cpu.c needs asm/spitfire.h · 12816ab3
  David S. Miller authored Feb 09, 2006
  12816ab3
- [SPARC64]: Print ARCH as SUN4V when tlb_type is hypervisor. · 3a8c069d
  David S. Miller authored Feb 09, 2006
  3a8c069d
- [SPARC64]: Detect sun4v early in boot process. · d82ace7d
  David S. Miller authored Feb 09, 2006
  d82ace7d
- [SPARC64]: Sun4v cross-call sending support. · 1d2f1f90
  David S. Miller authored Feb 08, 2006
  1d2f1f90
- [SPARC64]: Sun4v interrupt handling. · 5b0c0572
  David S. Miller authored Feb 08, 2006
  5b0c0572
- [SPARC64]: Allocate and register the 4 sun4v mondo queues at bootup. · ac29c11d
  David S. Miller authored Feb 08, 2006
  ac29c11d
- [SPARC64]: Verify all trap_per_cpu assembler offsets in trap_init() · e088ad7c
  David S. Miller authored Feb 07, 2006
  e088ad7c
- [SPARC64]: Add sun4v mondo queue bases to struct trap_per_cpu. · 7202c55c
  David S. Miller authored Feb 07, 2006
  7202c55c
- [SPARC64]: Fix some comment typos in asm/hypervisor.h · 3bfd6f3e
  David S. Miller authored Feb 07, 2006
  3bfd6f3e
- [SPARC64]: Patch up mmu context register writes for sun4v. · 8b11bd12
  David S. Miller authored Feb 07, 2006
  8b11bd12
- [SPARC64]: Register per-cpu fault status area with sun4v hypervisor. · 481295f9
  David S. Miller authored Feb 07, 2006
  481295f9
- [SPARC64]: asm/cpudata.h needs asm/asi.h · 89a5264f
  David S. Miller authored Feb 07, 2006
  89a5264f
- [SPARC64]: Niagara copy/clear page. · 8591e302
  David S. Miller authored Feb 07, 2006
  8591e302
- [SPARC64]: Rename gl_{1,2}insn_patch --> sun4v_{1,2}insn_patch · df7d6aec
  David S. Miller authored Feb 07, 2006
  df7d6aec
- [SPARC64]: Initial sun4v TLB miss handling infrastructure. · d257d5da
  David S. Miller authored Feb 06, 2006
  d257d5da
- [SPARC64]: Add missing memory barriers to instruction patching functions. · 840aaef8
  David S. Miller authored Feb 06, 2006
  840aaef8
- [SPARC64]: Sanitize %pstate writes for sun4v. · 45fec05f
  David S. Miller authored Feb 05, 2006
  45fec05f
- [SPARC64]: Kill all %pstate changes in context switch code. · 314981ac
  David S. Miller authored Feb 05, 2006
  314981ac
- [SPARC64]: Add initial code to twiddle %gl on trap entry/exit. · 936f482a
  David S. Miller authored Feb 05, 2006
  936f482a
- [SPARC64]: Fill dead cycles on trap entry with real work. · 6e02493a
  David S. Miller authored Feb 05, 2006
  6e02493a
- [SPARC64]: Add define for "GL" field of sun4v %tstate register. · d619d7f1
  David S. Miller authored Feb 04, 2006
  d619d7f1
- [SPARC64]: Add sun4v case to __GET_CPUID() patch tables. · d96b8153
  David S. Miller authored Feb 04, 2006
  d96b8153
- [SPARC64]: Sun4v interrupt queue register definitions. · e1c21c4f
  David S. Miller authored Feb 04, 2006
  e1c21c4f
- [SPARC64]: Sun4v scratchpad register layout. · 277b6dd9
  David S. Miller authored Feb 04, 2006
  277b6dd9
- [SPARC64]: Sun4v specific ASI defines. · d398ee23
  David S. Miller authored Feb 04, 2006
  d398ee23
- [SPARC64]: Niagara optimized memcpy() and copy_{to,from}_user(). · 398d1083
  David S. Miller authored Mar 05, 2006
  398d1083
- [SPARC64]: Add Niagara init-store twin-load ASI defines. · 30ddbdb0
  David S. Miller authored Feb 04, 2006
  30ddbdb0
- [SPARC64]: Add some hypervisor tlb_type checks. · a43fe0e7
  David S. Miller authored Feb 04, 2006
  a43fe0e7
- [SPARC64]: Add 'hypervisor' to ultra_tlb_type enumeration. · 1633a53c
  David S. Miller authored Feb 04, 2006
  1633a53c
- [SPARC64]: SUN4V hypervisor TLB flush support code. · 52bf082f
  David S. Miller authored Feb 04, 2006
  52bf082f
- [SPARC64]: SUN4V hypervisor interface defines. · 766f861f
  David S. Miller authored Feb 04, 2006
  766f861f
- [SPARC64]: Refine register window trap handling. · 314ef685
  David S. Miller authored Feb 04, 2006
  314ef685
- [SPARC64]: Add explicit register args to trap state loading macros. · ffe483d5
  David S. Miller authored Feb 02, 2006
  ffe483d5
- [SPARC64]: Refine code sequences to get the cpu id. · 92704a1c
  David S. Miller authored Feb 26, 2006
  92704a1c
- [SPARC64]: Turn off TSB growing for now. · f4e841da
  David S. Miller authored Feb 02, 2006
  f4e841da
- [SPARC64]: Correctable ECC errors cannot occur at trap level > 0. · 7bec08e3
  David S. Miller authored Feb 02, 2006
  7bec08e3
- [SPARC64]: Access TSB with physical addresses when possible. · 517af332
  David S. Miller authored Feb 01, 2006
  517af332
- [SPARC64]: Kill out-of-date commentary in asm-sparc64/tsb.h · b0fd4e49
  David S. Miller authored Jan 31, 2006
  b0fd4e49