Commits · 9d5f78fbbf924492001ac7b2915537968906e517 · jan.koester / Linux · GitLab

Jan 26, 2013
- drm/i915: VLV doesn't have SDVO · 9d5f78fb
  Ville Syrjälä authored Jan 25, 2013
  9d5f78fb
- drm/i915: Always use adpa_reg · ca54b810
  Ville Syrjälä authored Jan 25, 2013
  ca54b810
- drm/i915: PLL registers need an offset on VLV · fc2de409
  Ville Syrjälä authored Jan 25, 2013
  fc2de409
Jan 24, 2013
- drm/i915: Set display_mmio_offset for VLV · fba5d532
  Ville Syrjälä authored Jan 24, 2013
  fba5d532
- drm/i915: GPIO/GMBUS registers need an offset on VLV · d8112150
  Ville Syrjälä authored Jan 24, 2013
  d8112150
- drm/i915: DPIO registers are VLV only and need an offset · 54d9d493
  Ville Syrjälä authored Jan 24, 2013
  54d9d493
- drm/i915: Spell out VLV_DISPLAY_BASE for interrupt registers · ff763010
  Ville Syrjälä authored Jan 24, 2013
  ff763010
- drm/i915: Make VLV_GUNIT_CLOCK_GATE register value more readable · 07ec7ec5
  Ville Syrjälä authored Jan 24, 2013
  07ec7ec5
- drm/i915: FB_BLC_SELF_VLV is VLV only and needs an offset · d88b2270
  Ville Syrjälä authored Jan 24, 2013
  d88b2270
- drm/i915: Pipe palette registers need an offset on VLV · 4b059985
  Ville Syrjälä authored Jan 24, 2013
  4b059985
- drm/i915: Pipe timing registers need an offset on VLV · 4e8e7eb7
  Ville Syrjälä authored Jan 24, 2013
  4e8e7eb7
- drm/i915: PORT_HOTPLUG registers need an offset on VLV · 67d62c57
  Ville Syrjälä authored Jan 24, 2013
  67d62c57
- drm/i915: Panel fitter registers need an offset on VLV · 7e470abf
  Ville Syrjälä authored Jan 24, 2013
  7e470abf
- drm/i915: DPFLIPSTAT and DPINVGTT registers are VLV only and need an offset · b41fbda1
  Ville Syrjälä authored Jan 24, 2013
  b41fbda1
- drm/i915: DSPFW registers need an offset on VLV · 90f7da3f
  Ville Syrjälä authored Jan 24, 2013
  90f7da3f
- drm/i915: VLV_DDL is VLV only and needs an offset · 8f6d8ee9
  Ville Syrjälä authored Jan 24, 2013
  8f6d8ee9
- drm/i915: Cursor registers need an offset on VLV · 9dc33f31
  Ville Syrjälä authored Jan 24, 2013
  9dc33f31
- drm/i915: Pipe registers need an offset on VLV · 0c3870ee
  Ville Syrjälä authored Jan 24, 2013
  0c3870ee
- drm/i915: Primary plane registers need an offset on VLV · 895abf0c
  Ville Syrjälä authored Jan 24, 2013
  895abf0c
- drm/i915: PIPE M/N registers need an offset on VLV · aab17139
  Ville Syrjälä authored Jan 24, 2013
  aab17139
- drm/i915: VLV_VIDEO_DIP_CTL is for VLV only · b906487c
  Ville Syrjälä authored Jan 24, 2013
  b906487c
- drm/i915: Per-pipe PP registers are for VLV only · f12c47b2
  Ville Syrjälä authored Jan 24, 2013
  f12c47b2
- drm/i915: AUD_VID_DID needs an offset on VLV · f4ba9f81
  Ville Syrjälä authored Jan 24, 2013
  f4ba9f81
- drm/i915: Add display_display_mmio_offset to intel_device_info · 10fce67a
  Ville Syrjälä authored Jan 24, 2013
  10fce67a
- drm/i915: Convert intel_dp to enum port · 34f2be46
  Ville Syrjälä authored Jan 24, 2013
  34f2be46
- drm/i915: Convert intel_hdmi to enum port · 69fde0a6
  Ville Syrjälä authored Jan 24, 2013
  69fde0a6
- drm/i915: don't save/restore DSPARB on gen5+ · 8de0add7
  Paulo Zanoni authored Jan 18, 2013
  8de0add7
Jan 22, 2013
- drm/i915: fixup sbi_read/write locking · c00db246
  Daniel Vetter authored Jan 22, 2013
  c00db246
- drm/i915: HDMI/DP - ELD info refresh support for Haswell · 7b9f35a6
  Wang Xingchao authored Jan 22, 2013
  7b9f35a6
- drm/i915: use gem_set_seqno() on hardware init · 99433931
  Mika Kuoppala authored Jan 22, 2013
  99433931
- drm/i915: add quirk to invert brightness on Packard Bell NCL20 · 5559ecad
  Jani Nikula authored Jan 22, 2013
  5559ecad
- drm/i915: add quirk to invert brightness on eMachines e725 · 01e3a8fe
  Jani Nikula authored Jan 22, 2013
  01e3a8fe
- drm/i915: add quirk to invert brightness on eMachines G725 · 1ffff603
  Jani Nikula authored Jan 22, 2013
  1ffff603
Jan 21, 2013
- drm/i915: clarify concurrent hang detect/gpu reset consistency · 7db0ba24
  Daniel Vetter authored Dec 06, 2012
  7db0ba24
- drm/i915: create a race-free reset detection · f69061be
  Daniel Vetter authored Dec 06, 2012
  f69061be
Jan 20, 2013
- drm/i915: Only apply the mb() when flushing the GTT domain during a finish · 97c809fd
  Chris Wilson authored Oct 09, 2012
  97c809fd
- drm/i915: Only insert the mb() before updating the fence parameter · d0a57789
  Chris Wilson authored Oct 09, 2012
  d0a57789
- drm/i915: clear up wedged transitions · 1f83fee0
  Daniel Vetter authored Nov 15, 2012
  1f83fee0
- drm/i915: fix reset handling in the throttle ioctl · 308887aa
  Daniel Vetter authored Nov 14, 2012
  308887aa
- drm/i915: move wedged to the other gpu error handling stuff · 33196ded
  Daniel Vetter authored Nov 14, 2012
  33196ded