Commits · b30edfd8d0b4b22f9c17c208064b39a3d93e6971 · jan.koester / Linux · GitLab

Oct 12, 2020
- drm/i915: Switch to LTTPR non-transparent mode link training · b30edfd8
  Imre Deak authored Oct 07, 2020
  b30edfd8
- drm/i915: Switch to LTTPR transparent mode link training · 7b2a4ab8
  Imre Deak authored Oct 07, 2020
  7b2a4ab8
- drm/dp: Add LTTPR helpers · 9782f52a
  Imre Deak authored Oct 07, 2020
  9782f52a
- drm/i915: Factor out a helper to disable the DPCD training pattern · c43027a9
  Imre Deak authored Oct 07, 2020
  c43027a9
- drm/i915: Simplify the link training functions · 0a5991f5
  Imre Deak authored Oct 07, 2020
  0a5991f5
- drm/i915: Fix DP link training pattern mask · 6777a855
  Imre Deak authored Oct 07, 2020
  6777a855
Oct 10, 2020
- drm/i915: Update gen12 multicast register ranges · 3bcacad3
  Matt Roper authored Oct 09, 2020
  3bcacad3
- drm/i915: Update gen12 forcewake table · 92f5df0d
  Matt Roper authored Oct 09, 2020
  92f5df0d
- drm/i915: Rename FORCEWAKE_BLITTER to FORCEWAKE_GT · 55e3c170
  Matt Roper authored Oct 09, 2020
  55e3c170
Oct 09, 2020
- drm/i915/display: Program PSR2 selective fetch registers · 0bcbcba7
  José Roberto de Souza authored Oct 07, 2020
  0bcbcba7
- drm/i915/display: Check PSR parameter and flag only in state compute phase · 5c90660f
  José Roberto de Souza authored Oct 07, 2020
  5c90660f
- drm/i915/display: Ignore IGNORE_PSR2_HW_TRACKING for platforms without sel fetch · 90a24b9d
  José Roberto de Souza authored Oct 07, 2020
  90a24b9d
- drm/i915/vbt: Add VRR VBT toggle · a23fe79a
  José Roberto de Souza authored Oct 08, 2020
  a23fe79a
- drm/i915/vbt: Update the version and expected size of BDB_GENERAL_DEFINITIONS map · e4b3c3b3
  José Roberto de Souza authored Oct 08, 2020
  e4b3c3b3
- drm/i915/vbt: Fix backlight parsing for VBT 234+ · d381baad
  José Roberto de Souza authored Oct 08, 2020
  d381baad
- drm/i915: s/int/u32/ for aux_offset/alignment · 63b9d9aa
  Ville Syrjälä authored Oct 08, 2020
  63b9d9aa
- drm/i915: Skip aux plane stuff when there is no aux plane · a007138e
  Ville Syrjälä authored Oct 09, 2020
  a007138e
- drm/i915: Set all unused color plane offsets to ~0xfff again · 79148ce4
  Ville Syrjälä authored Oct 08, 2020
  79148ce4
- drm/i915: Rename i915_{save,restore}_state() · 0f8d2a2b
  Ville Syrjälä authored Oct 05, 2020
  0f8d2a2b
- drm/i915: Wait for VLV/CHV/BXT/GLK DSI panel power cycle delay on reboot · f13c2a00
  Ville Syrjälä authored Oct 01, 2020
  f13c2a00
- drm/i915: Wait for LVDS panel power cycle delay on reboot · d2008827
  Ville Syrjälä authored Oct 01, 2020
  d2008827
- drm/i915: Wait for eDP panel power cycle delay on reboot on all platforms · e219ef91
  Ville Syrjälä authored Oct 01, 2020
  e219ef91
- drm/i915: Replace the VLV/CHV eDP reboot notifier with the .shutdown() hook · 063348f6
  Ville Syrjälä authored Oct 01, 2020
  063348f6
- drm/i915: Add an encoder .shutdown() hook · 100fe4c0
  Ville Syrjälä authored Oct 01, 2020
  100fe4c0
- drm/i915: Shut down displays gracefully on reboot · fe0f1e3b
  Ville Syrjälä authored Oct 01, 2020
  fe0f1e3b
Oct 07, 2020
- drm/i915/dg1: provide port/phy mapping for vbt · 67807f52
  Matt Roper authored Oct 06, 2020
  67807f52
- drm/i915/dg1: Update comp master/slave relationships for PHYs · e73e4c59
  Matt Roper authored Oct 06, 2020
  e73e4c59
- drm/i915/dg1: Don't program PHY_MISC for PHY-C and PHY-D · 0642c2b8
  Matt Roper authored Oct 06, 2020
  0642c2b8
- drm/i915/dg1: gmbus pin mapping · fb7318c3
  Lucas De Marchi authored Oct 06, 2020
  fb7318c3
- drm/i915/dg1: Increase mmio size to 4MB · eafeb204
  Venkata Sandeep Dhanalakota authored Oct 06, 2020
  eafeb204
- drm/i915/dg1: Define MOCS table for DG1 · 2606b269
  Lucas De Marchi authored Oct 06, 2020
  2606b269
- drm/i915/dg1: Initialize RAWCLK properly · 27a6bc80
  Matt Roper authored Oct 06, 2020
  27a6bc80
- drm/i915/dg1: add more PCI ids · b50b7991
  Lucas De Marchi authored Oct 06, 2020
  b50b7991
- drm/i915/display/ehl: Limit eDP to HBR2 · cf725620
  José Roberto de Souza authored Oct 05, 2020
  cf725620
Oct 06, 2020
- drm/i915/tgl: Fix Combo PHY DPLL fractional divider for 38.4MHz ref clock · 0e2497e3
  Imre Deak authored Oct 03, 2020
  0e2497e3
- drm/i915: Add an encoder hook to sanitize its state during init/resume · f9e76a6e
  Imre Deak authored Oct 06, 2020
  f9e76a6e
- drm/i915: Check for unsupported DP link rates during initial commit · 7d6287a8
  Imre Deak authored Oct 03, 2020
  7d6287a8
- drm/i915: Move the initial fastset commit check to encoder hooks · b671d6ef
  Imre Deak authored Oct 06, 2020
  b671d6ef
- drm/i915/skl: Work around incorrect BIOS WRPLL PDIV programming · 7a8a95f5
  Imre Deak authored Oct 06, 2020
  7a8a95f5
Oct 05, 2020
- drm/i915/dg1: Wait for pcode/uncore handshake at startup · f9c730ed
  Matt Roper authored Sep 30, 2020
  f9c730ed