Commits · b9e705ef7cfaf22db0daab91ad3cd33b0fa32eb9 · jan.koester / Linux · GitLab

Jan 05, 2018
- x86/alternatives: Add missing '\n' at end of ALTERNATIVE inline asm · b9e705ef
  David Woodhouse authored Jan 04, 2018
  b9e705ef
Jan 04, 2018
- x86/tlb: Drop the _GPL from the cpu_tlbstate export · 1e547681
  Thomas Gleixner authored Jan 04, 2018
  1e547681
- x86/events/intel/ds: Use the proper cache flush method for mapping ds buffers · 42f3bdc5
  Peter Zijlstra authored Jan 04, 2018
  42f3bdc5
- x86/kaslr: Fix the vaddr_end mess · 1dddd251
  Thomas Gleixner authored Jan 04, 2018
  1dddd251
- x86/mm: Map cpu_entry_area at the same place on 4/5 level · f2078904
  Thomas Gleixner authored Jan 04, 2018
  f2078904
- x86/mm: Set MODULES_END to 0xffffffffff000000 · f5a40711
  Andrey Ryabinin authored Dec 28, 2017
  f5a40711
Jan 03, 2018
- x86/process: Define cpu_tss_rw in same section as declaration · 2fd9c41a
  Nick Desaulniers authored Jan 03, 2018
  2fd9c41a
- x86/pti: Switch to kernel CR3 at early in entry_SYSCALL_compat() · d7732ba5
  Thomas Gleixner authored Jan 03, 2018
  d7732ba5
- x86/dumpstack: Print registers for first stack frame · 3ffdeb1a
  Josh Poimboeuf authored Dec 31, 2017
  3ffdeb1a
- x86/dumpstack: Fix partial register dumps · a9cdbe72
  Josh Poimboeuf authored Dec 31, 2017
  a9cdbe72
- x86/pti: Make sure the user/kernel PTEs match · 52994c25
  Thomas Gleixner authored Jan 03, 2018
  52994c25
- x86/cpu, x86/pti: Do not enable PTI on AMD processors · 694d99d4
  Tom Lendacky authored Dec 26, 2017
  694d99d4
- x86/pti: Enable PTI by default · 87faa0d9
  Thomas Gleixner authored Jan 03, 2018
  87faa0d9
Dec 31, 2017
- x86/ldt: Make LDT pgtable free conditional · 7f414195
  Thomas Gleixner authored Dec 31, 2017
  7f414195
- x86/ldt: Plug memory leak in error path · a62d6985
  Thomas Gleixner authored Dec 31, 2017
  a62d6985
- x86/mm: Remove preempt_disable/enable() from __native_flush_tlb() · decab088
  Thomas Gleixner authored Dec 30, 2017
  decab088
- x86/smpboot: Remove stale TLB flush invocations · 322f8b8b
  Thomas Gleixner authored Dec 30, 2017
  322f8b8b
Dec 23, 2017
- x86/ldt: Make the LDT mapping RO · 9f5cb6b3
  Thomas Gleixner authored Dec 15, 2017
  9f5cb6b3
- x86/mm/dump_pagetables: Allow dumping current pagetables · a4b51ef6
  Thomas Gleixner authored Dec 04, 2017
  a4b51ef6
- x86/mm/dump_pagetables: Check user space page table for WX pages · b4bf4f92
  Thomas Gleixner authored Dec 04, 2017
  b4bf4f92
- x86/mm/dump_pagetables: Add page table directory to the debugfs VFS hierarchy · 75298aa1
  Borislav Petkov authored Dec 04, 2017
  75298aa1
- x86/mm/pti: Add Kconfig · 385ce0ea
  Dave Hansen authored Dec 04, 2017
  385ce0ea
- x86/dumpstack: Indicate in Oops whether PTI is configured and enabled · 5f26d76c
  Vlastimil Babka authored Dec 19, 2017
  5f26d76c
- x86/mm: Clarify the whole ASID/kernel PCID/user PCID naming · 0a126abd
  Peter Zijlstra authored Dec 05, 2017
  0a126abd
- x86/mm: Use INVPCID for __native_flush_tlb_single() · 6cff64b8
  Dave Hansen authored Dec 04, 2017
  6cff64b8
- x86/mm: Optimize RESTORE_CR3 · 21e94459
  Peter Zijlstra authored Dec 04, 2017
  21e94459
- x86/mm: Use/Fix PCID to optimize user/kernel switches · 6fd166aa
  Peter Zijlstra authored Dec 04, 2017
  6fd166aa
- x86/mm: Abstract switching CR3 · 48e11198
  Dave Hansen authored Dec 04, 2017
  48e11198
- x86/mm: Allow flushing for future ASID switches · 2ea907c4
  Dave Hansen authored Dec 04, 2017
  2ea907c4
- x86/pti: Map the vsyscall page if needed · 85900ea5
  Andy Lutomirski authored Dec 12, 2017
  85900ea5
- x86/pti: Put the LDT in its own PGD if PTI is on · f55f0501
  Andy Lutomirski authored Dec 12, 2017
  f55f0501
- x86/mm/64: Make a full PGD-entry size hole in the memory map · 9f449772
  Andy Lutomirski authored Dec 12, 2017
  9f449772
- x86/events/intel/ds: Map debug buffers in cpu_entry_area · c1961a46
  Hugh Dickins authored Dec 04, 2017
  c1961a46
- x86/cpu_entry_area: Add debugstore entries to cpu_entry_area · 10043e02
  Thomas Gleixner authored Dec 04, 2017
  10043e02
- x86/mm/pti: Map ESPFIX into user space · 4b6bbe95
  Andy Lutomirski authored Dec 15, 2017
  4b6bbe95
- x86/mm/pti: Share entry text PMD · 6dc72c3c
  Thomas Gleixner authored Dec 04, 2017
  6dc72c3c
- x86/entry: Align entry text section to PMD boundary · 2f7412ba
  Thomas Gleixner authored Dec 04, 2017
  2f7412ba
- x86/mm/pti: Share cpu_entry_area with user space page tables · f7cfbee9
  Andy Lutomirski authored Dec 04, 2017
  f7cfbee9
- x86/mm/pti: Force entry through trampoline when PTI active · 8d4b0678
  Thomas Gleixner authored Dec 04, 2017
  8d4b0678
- x86/mm/pti: Add functions to clone kernel PMDs · 03f4424f
  Andy Lutomirski authored Dec 04, 2017
  03f4424f