Commits · e934945db7625716f9cc469e31fc5da8666c8024 · jan.koester / Linux · GitLab

Mar 31, 2015
- MIPS, ttyFDC: Add early FDC console support · e934945d
  James Hogan authored Jan 29, 2015
  e934945d
- TTY: Add MIPS EJTAG Fast Debug Channel TTY driver · 4cebec60
  James Hogan authored Jan 29, 2015
  4cebec60
- MIPS: idle: Workaround wait + FDC problems · e38df288
  James Hogan authored Jan 29, 2015
  e38df288
- MIPS: Malta: Implement get_c0_fdc_int() · 602e8a34
  James Hogan authored Jan 29, 2015
  602e8a34
- IRQCHIP: mips-gic: Add function for retrieving FDC IRQ · 6429e2b6
  James Hogan authored Jan 29, 2015
  6429e2b6
- irqchip: mips-gic: Don't treat FDC IRQ as percpu devid · b720fd8b
  James Hogan authored Jan 29, 2015
  b720fd8b
- MIPS: Read CPU IRQ line that FDC to routed to · 8f7ff027
  James Hogan authored Jan 29, 2015
  8f7ff027
- MIPS: Add architectural FDC IRQ fields · 9323f84f
  James Hogan authored Jan 29, 2015
  9323f84f
- MIPS: Malta: Implement mips_cdmm_phys_base() · 296b7c68
  James Hogan authored Feb 02, 2015
  296b7c68
- MIPS: Add CDMM bus support · 8286ae03
  James Hogan authored Mar 25, 2015
  8286ae03
- MIPS: Add arch CDMM definitions and probing · 9b3274bd
  James Hogan authored Feb 02, 2015
  9b3274bd
- MIPS: Allow shared IRQ for timer & perf counter · 4a91d8fb
  James Hogan authored Jan 27, 2015
  4a91d8fb
- MIPS: OProfile: Allow sharing IRQ with timer · 369a93bb
  James Hogan authored Jan 27, 2015
  369a93bb
- MIPS: perf: Allow sharing IRQ with timer · a1ec0e18
  James Hogan authored Jan 27, 2015
  a1ec0e18
- MIPS: cevt-r4k: Cleanup c0_compare_interrupt. · f0c5b894
  Ralf Baechle authored Mar 20, 2015
  f0c5b894
- MIPS: cevt-r4k: Make interrupt handler shared · 7dfe8198
  James Hogan authored Jan 27, 2015
  7dfe8198
- IRQCHIP: mips-gic: Add missing definitions for FDC IRQ · ea3c023e
  James Hogan authored Jan 27, 2015
  ea3c023e
- IRQCHIP: mips-gic: Fix typo in comment · 7e3e6cb2
  James Hogan authored Jan 27, 2015
  7e3e6cb2
- MIPS: Remove redundant IPTI==IPPCI logic · 7eca5b14
  James Hogan authored Jan 27, 2015
  7eca5b14
- MIPS: cevt-r4k: Use CAUSEF_TI, CAUSEF_PCI constants · 3ba5040a
  James Hogan authored Jan 27, 2015
  3ba5040a
- MIPS: cevt-r4k: Move handle_perf_irq() out of header · 19971c0b
  James Hogan authored Jan 27, 2015
  19971c0b
- MIPS: pistachio: Add an initial defconfig · c9d6c8b0
  Govindraj Raja authored Mar 16, 2015
  c9d6c8b0
- MIPS: Add support for the IMG Pistachio SoC · 6a438309
  Andrew Bresticker authored Mar 16, 2015
  6a438309
- MIPS: Document Pistachio boot protocol and device-tree bindings · e14ba3cd
  Andrew Bresticker authored Mar 16, 2015
  e14ba3cd
- MIPS: Allow platforms to specify the decompressor load address · b76a4c1a
  Andrew Bresticker authored Mar 16, 2015
  b76a4c1a
- MIPS: Create a common <asm/mach-generic/war.h> · d631fc60
  Kevin Cernekee authored Mar 16, 2015
  d631fc60
- CLK: Pistachio: Register external clock gates · a47eb351
  Andrew Bresticker authored Feb 24, 2015
  a47eb351
- CLK: Pistachio: Register system interface gate clocks · 8cb94af6
  Andrew Bresticker authored Feb 24, 2015
  8cb94af6
- CLK: Pistachio: Register peripheral clocks · 44960ab8
  Andrew Bresticker authored Feb 24, 2015
  44960ab8
- CLK: Pistachio: Register core clocks · b35d7c33
  Andrew Bresticker authored Feb 24, 2015
  b35d7c33
- CLK: Pistachio: Add PLL driver · 43049b0c
  Andrew Bresticker authored Feb 24, 2015
  43049b0c
- CLK: Add basic infrastructure for Pistachio clocks · 8e4b7721
  Andrew Bresticker authored Feb 24, 2015
  8e4b7721
Mar 27, 2015
- CLK: Add binding document for Pistachio clock controllers · 1006e3c9
  Andrew Bresticker authored Feb 24, 2015
  1006e3c9
Mar 24, 2015
- CRYPTO: Octeon: Enable OCTEON SHA1/256/512 module selection · b112e7c9
  Aaro Koskinen authored Mar 08, 2015
  b112e7c9
- CRYPTO: Octeon: Add SHA512 module · 041a80c5
  Aaro Koskinen authored Mar 08, 2015
  041a80c5
- CRYPTO: Octeon: Add SHA256 module · 8ab36830
  Aaro Koskinen authored Mar 08, 2015
  8ab36830
- CRYPTO: Octeon: Add SHA1 module · 63bb06ee
  Aaro Koskinen authored Mar 08, 2015
  63bb06ee
- CRYPTO: Octeon: Add instruction definitions for SHA1/256/512 · a3d2a10b
  Aaro Koskinen authored Mar 08, 2015
  a3d2a10b
- CRYPTO: Octeon: always disable preemption when using crypto engine · e606ee20
  Aaro Koskinen authored Mar 08, 2015
  e606ee20
- CRYPTO: Octeon: Don't disable bottom half in octeon-md5 · f7715e72
  Aaro Koskinen authored Mar 08, 2015
  f7715e72