Commits · e93c28f39375558409329a02a767d5cadfcc4a31 · jan.koester / Linux · GitLab

Sep 02, 2015
- Merge tag 'drm-intel-next-fixes-2015-09-02' into drm-intel-next-queued · e93c28f3
  Daniel Vetter authored Sep 02, 2015
  e93c28f3
- drm/i915: Also record time difference if vblank evasion fails, v2. · 85a62bf9
  Maarten Lankhorst authored Sep 01, 2015
  85a62bf9
- drm/i915: Remove start frame argument to pipe_update_begin/end. · 34e0adbb
  Maarten Lankhorst authored Aug 31, 2015
  34e0adbb
- drm/i915: guest i915 notification for Intel GVT-g · 650da34c
  Zhiyuan Lv authored Aug 28, 2015
  650da34c
- drm/i915: Update PV INFO page definition for Intel GVT-g · 532beabf
  Zhiyuan Lv authored Aug 28, 2015
  532beabf
- drm/i915: Always enable execlists on BDW for vgpu · a0bd6c31
  Zhiyuan Lv authored Aug 28, 2015
  a0bd6c31
- drm/i915: preallocate pdps for 32 bit vgpu · 331f38e7
  Zhiyuan Lv authored Aug 28, 2015
  331f38e7
- drm/i915: add yesno utility function · 42a8ca4c
  Jani Nikula authored Aug 27, 2015
  42a8ca4c
- drm/i915: move intel_hrawclk() to intel_display.c · 79e50a4f
  Jani Nikula authored Aug 26, 2015
  79e50a4f
- drm/i915: Notify GuC rc6 state · f5d3c3ea
  Alex Dai authored Aug 18, 2015
  f5d3c3ea
- drm/i915/guc: Support GuC version 4.3 · aa557ab0
  Alex Dai authored Aug 18, 2015
  aa557ab0
- drm/i915: Fix module initialisation, v2. · 1751fcf9
  Maarten Lankhorst authored Aug 27, 2015
  1751fcf9
Sep 01, 2015
- drm/i915: Factor out intel_crtc_has_encoders() · 02e93c35
  Ville Syrjälä authored Aug 26, 2015
  02e93c35
- drm/i915: Fix clock readout when pipes are enabled w/o ports · 0f64614d
  Ville Syrjälä authored Aug 26, 2015
  0f64614d
- drm/i915: Add CHV PHY LDO power sanity checks · 30142273
  Ville Syrjälä authored Jul 08, 2015
  30142273
- drm/i915: Add some CHV DPIO lane power state asserts · 6669e39f
  Ville Syrjälä authored Jul 08, 2015
  6669e39f
- drm/i915: Clean up CHV lane soft reset programming · a8f327fb
  Ville Syrjälä authored Jul 09, 2015
  a8f327fb
- i915: Set ddi_pll_sel in DP MST path · 6fa2d197
  Ander Conselvan de Oliveira authored Aug 31, 2015
  6fa2d197
- drm/i915: Bump command parser version number. · 2bbe6bbb
  Francisco Jerez authored Jun 15, 2015
  2bbe6bbb
- drm/i915/dp: use the drm dp helper for determining sink tps3 support · caa860d9
  Jani Nikula authored Aug 27, 2015
  caa860d9
- drm/i915: Don't use link_bw for PLL setup · 7e6313a2
  Ville Syrjälä authored Aug 11, 2015
  7e6313a2
- drm/dp: add drm_dp_tps3_supported helper · 7cc53cf0
  Jani Nikula authored Aug 26, 2015
  7cc53cf0
- drm/i915: Preserve SSC earlier · 69f92f67
  Lukas Wunner authored Jul 15, 2015
  69f92f67
Aug 31, 2015
- drm/i915/skl: Adding DDI_E power well domain · d8e19f99
  Xiong Zhang authored Aug 13, 2015
  d8e19f99
- drm/i915: eDP can be present on DDI-E · 477ec328
  Rodrigo Vivi authored Aug 06, 2015
  477ec328
- drm/i915/skl: Enable DDI-E · 2800e4c2
  Rodrigo Vivi authored Aug 07, 2015
  2800e4c2
- drm/i915: Enable HDMI on DDI-E · 11c1b657
  Xiong Zhang authored Aug 17, 2015
  11c1b657
- drm/i915: apply the PCI_D0/D3 hibernation workaround everywhere on pre GEN6 · 54875571
  Imre Deak authored Jun 30, 2015
  54875571
- drm/i915: Check DP link status on long hpd too · d14e7b6d
  Ville Syrjälä authored Aug 20, 2015
  d14e7b6d
Aug 28, 2015
- drm/i915: set CDCLK if DPLL0 enabled during resuming from S3 · 39d9b85a
  Gary Wang authored Aug 28, 2015
  39d9b85a
- drm/i915: Update DRIVER_DATE to 20150828 · 01302d4d
  Daniel Vetter authored Aug 28, 2015
  01302d4d
Aug 26, 2015
- Partially revert "drm/i915: Use full atomic modeset." · c5b852f3
  Maarten Lankhorst authored Aug 26, 2015
  c5b852f3
- drm/i915: gen 9 can check for unclaimed registers too · 6c908bf4
  Paulo Zanoni authored Aug 25, 2015
  6c908bf4
- drm/i915: Force CL2 off in CHV x1 PHY · 3e288786
  Ville Syrjälä authored Jul 08, 2015
  3e288786
- drm/i915: Enable DPIO SUS clock gating on CHV · ee279218
  Ville Syrjälä authored Jul 08, 2015
  ee279218
- drm/i915: Force common lane on for the PPS kick on CHV · 0047eedc
  Ville Syrjälä authored Jul 10, 2015
  0047eedc
- drm/i915: Trick CL2 into life on CHV when using pipe B with port B · b0b33846
  Ville Syrjälä authored Jul 08, 2015
  b0b33846
- drm/i915: Implement PHY lane power gating for CHV · e0fce78f
  Ville Syrjälä authored Jul 08, 2015
  e0fce78f
- drm/i915: Move DPLL ref/cri/VGA mode frobbing to the disp2d well enable · 5a8fbb7d
  Ville Syrjälä authored Jun 29, 2015
  5a8fbb7d
- drm/i915: Make some string arrays const · 4d9194de
  Ville Syrjälä authored Aug 21, 2015
  4d9194de