Commits · f54c7b5898d31eda3d6608da13b55c0466ba49fe · jan.koester / Linux · GitLab

May 01, 2021
- RISC-V: Always define XIP_FIXUP · f54c7b58
  Palmer Dabbelt authored Apr 28, 2021
  f54c7b58
- riscv: Remove 32b kernel mapping from page table dump · 28252e08
  Alexandre Ghiti authored Apr 18, 2021
  28252e08
- riscv: Fix 32b kernel build with CONFIG_DEBUG_VIRTUAL=y · 883fcb8e
  Alexandre Ghiti authored Apr 28, 2021
  883fcb8e
- RISC-V: Fix error code returned by riscv_hartid_to_cpuid() · 533b4f3a
  Anup Patel authored Apr 15, 2021
  533b4f3a
Apr 26, 2021
- RISC-V: Enable Microchip PolarFire ICICLE SoC · 29511620
  Atish Patra authored Mar 03, 2021
  29511620
- RISC-V: Initial DTS for Microchip ICICLE board · 0fa6107e
  Atish Patra authored Mar 03, 2021
  0fa6107e
- dt-bindings: riscv: microchip: Add YAML documentation for the PolarFire SoC · d53b0244
  Atish Patra authored Mar 03, 2021
  d53b0244
- RISC-V: Add Microchip PolarFire SoC kconfig option · 99b3e3d4
  Atish Patra authored Mar 03, 2021
  99b3e3d4
- RISC-V: enable XIP · 44c92257
  Vitaly Wool authored Apr 13, 2021
  44c92257
- RISC-V: Add crash kernel support · 56409750
  Nick Kossifidis authored Apr 19, 2021
  56409750
- RISC-V: Add kdump support · e53d2818
  Nick Kossifidis authored Apr 19, 2021
  e53d2818
- RISC-V: Improve init_resources() · ffe0e526
  Nick Kossifidis authored Apr 19, 2021
  ffe0e526
- RISC-V: Add kexec support · fba8a867
  Nick Kossifidis authored Apr 19, 2021
  fba8a867
- RISC-V: Add EM_RISCV to kexec UAPI header · d83e682e
  Nick Kossifidis authored Apr 19, 2021
  d83e682e
- riscv: vdso: fix and clean-up Makefile · 772d7891
  Jisheng Zhang authored Apr 02, 2021
  772d7891
- riscv/mm: Use BUG_ON instead of if condition followed by BUG. · e75e6bf4
  zhouchuangao authored Mar 30, 2021
  e75e6bf4
- riscv/kprobe: fix kernel panic when invoking sys_read traced by kprobe · b1ebaa0e
  Liao Chang authored Mar 30, 2021
  b1ebaa0e
- riscv: Set ARCH_HAS_STRICT_MODULE_RWX if MMU · a9451b8e
  Jisheng Zhang authored Mar 30, 2021
  a9451b8e
- riscv: module: Create module allocations without exec permissions · 5387054b
  Jisheng Zhang authored Mar 30, 2021
  5387054b
- riscv: bpf: Avoid breaking W^X · fc850476
  Jisheng Zhang authored Mar 30, 2021
  fc850476
- riscv: bpf: Move bpf_jit_alloc_exec() and bpf_jit_free_exec() to core · 1d27d854
  Jisheng Zhang authored Mar 30, 2021
  1d27d854
- riscv: kprobes: Implement alloc_insn_page() · cdd1b2bd
  Jisheng Zhang authored Mar 30, 2021
  cdd1b2bd
- riscv: Constify sbi_ipi_ops · 300f62c3
  Jisheng Zhang authored Mar 30, 2021
  300f62c3
- riscv: Constify sys_call_table · e6a30224
  Jisheng Zhang authored Mar 30, 2021
  e6a30224
- riscv: Mark some global variables __ro_after_init · de31ea4a
  Jisheng Zhang authored Mar 30, 2021
  de31ea4a
- riscv: add __init section marker to some functions · 1987501b
  Jisheng Zhang authored Mar 30, 2021
  1987501b
- riscv: Prepare ptdump for vm layout dynamic addresses · 0df68ce4
  Alexandre Ghiti authored Apr 11, 2021
  0df68ce4
- Documentation: riscv: Add documentation that describes the VM layout · 2a433cf8
  Alexandre Ghiti authored Apr 11, 2021
  2a433cf8
- riscv: Move kernel mapping outside of linear mapping · 2bfc6cd8
  Alexandre Ghiti authored Apr 11, 2021
  2bfc6cd8
- samples/kprobes: Add riscv support · 8a07ac39
  Jisheng Zhang authored Mar 30, 2021
  8a07ac39
- riscv: Select HAVE_DYNAMIC_FTRACE when -fpatchable-function-entry is available · adebc881
  Nathan Chancellor authored Mar 25, 2021
  adebc881
- riscv: Workaround mcount name prior to clang-13 · 7ce04771
  Nathan Chancellor authored Mar 25, 2021
  7ce04771
- scripts/recordmcount.pl: Fix RISC-V regex for clang · 2f095504
  Nathan Chancellor authored Mar 25, 2021
  2f095504
- riscv: Use $(LD) instead of $(CC) to link vDSO · 7f3d3490
  Nathan Chancellor authored Mar 25, 2021
  7f3d3490
- riscv: sifive: Apply errata "cip-1200" patch · bff3ff52
  Vincent Chen authored Mar 22, 2021
  bff3ff52
- riscv: sifive: Apply errata "cip-453" patch · 800149a7
  Vincent Chen authored Mar 22, 2021
  800149a7
- riscv: sifive: Add SiFive alternative ports · 1a0e5dbd
  Vincent Chen authored Mar 22, 2021
  1a0e5dbd
- riscv: Introduce alternative mechanism to apply errata solution · 6f4eea90
  Vincent Chen authored Mar 22, 2021
  6f4eea90
- riscv: Add 3 SBI wrapper functions to get cpu manufacturer information · 183787c6
  Vincent Chen authored Mar 22, 2021
  183787c6
Mar 30, 2021
- kbuild: buildtar: add riscv support · 7d0bc44b
  Carlos de Paula authored Mar 16, 2021
  7d0bc44b