Commits · 1ae0d1377fda91367b27596001c82e877ec2057e · jan.koester / Linux · GitLab

Aug 08, 2014
- drm/i915: Split chv_update_pll() apart · 1ae0d137
  Ville Syrjälä authored Jun 28, 2014
  1ae0d137
- drm/i915: Leave DPLL ref clocks on · d17ec4ce
  Ville Syrjälä authored Jun 28, 2014
  d17ec4ce
- drm/i915: Disable cdclk changes for chv until Punit is ready · d49a340d
  Ville Syrjälä authored Jun 28, 2014
  d49a340d
- drm/i915: Add cdclk change support for chv · 383c5a6a
  Ville Syrjälä authored Jun 28, 2014
  383c5a6a
- d rm/i915: freeze display before the interrupts and GT · 06ffc778
  Paulo Zanoni authored Jul 17, 2014
  06ffc778
- drm/i915: Make ddi_clock_gate() HSW/BDW specific · 3d51278a
  Daniel Vetter authored Jul 29, 2014
  3d51278a
- drm/i915: Split the CDCLK retrieval per-platform · ad13d604
  Damien Lespiau authored Jul 29, 2014
  ad13d604
- drm/i915: Make intel_ddi_calculate_wrpll() HSW/BDW specific · d664c0ce
  Damien Lespiau authored Jul 29, 2014
  d664c0ce
- drm/i915: Split the BDW/HSW specific shared pll selection · 0220ab6e
  Damien Lespiau authored Jul 29, 2014
  0220ab6e
- drm/i915: Fix stale comment for intel_ddi_pll_select() · bf9584bd
  Damien Lespiau authored Jul 29, 2014
  bf9584bd
- drm/i915: Restrict hsw_dp_set_ddi_pll_sel() to HSW/BDW · ea155f32
  Damien Lespiau authored Jul 29, 2014
  ea155f32
- drm/i915: Extract the HSW/BDW shared dpll init code · 143b307c
  Damien Lespiau authored Jul 29, 2014
  143b307c
- drm/i915: Extract the HSW DDI selection code into its own function · 7d2c8175
  Damien Lespiau authored Jul 29, 2014
  7d2c8175
- drm/i915: Add a space to the shared DPLL debug message · 74dd6928
  Damien Lespiau authored Jul 29, 2014
  74dd6928
- drm/i915: Specify when the PLL hw state fields are valid · dcfc3552
  Damien Lespiau authored Jul 29, 2014
  dcfc3552
- drm/i915: Add DP training pattern 3 for CHV · aad3d14d
  Ville Syrjälä authored Jun 28, 2014
  aad3d14d
- drm/i915: Split a few long debug prints · a5043453
  Ville Syrjälä authored Jun 28, 2014
  a5043453
- drm/i915: Fix read back of plane stride register · 026b96e2
  Rafael Barbalho authored Jul 28, 2014
  026b96e2
- drm/i915: Add chv port D TX wells · 2ce147f3
  Ville Syrjälä authored Jun 28, 2014
  2ce147f3
- drm/i915: Add chv port B and C TX wells · 82583565
  Ville Syrjälä authored Jun 28, 2014
  82583565
- drm/i915: Add per-pipe power wells for chv · 26972b0a
  Ville Syrjälä authored Jun 28, 2014
  26972b0a
- drm/i915: Add disp2d power well for chv · f07057d1
  Ville Syrjälä authored Jun 28, 2014
  f07057d1
- drm/i915: Kill intel_reset_dpio() · a74d782c
  Ville Syrjälä authored Jun 28, 2014
  a74d782c
- drm/i915: Add chv cmnlane power wells · 5d6f7ea7
  Ville Syrjälä authored Jun 28, 2014
  5d6f7ea7
- drm/i915: Add chv_power_wells[] · 4811ff4f
  Ville Syrjälä authored Jun 28, 2014
  4811ff4f
- drm/i915: Kill intel_crtc->vbl_wait · 210871b6
  Ville Syrjälä authored May 22, 2014
  210871b6
- drm: Add drm_crtc_vblank_waitqueue() · 020178a1
  Ville Syrjälä authored May 22, 2014
  020178a1
- drm/i915: State readout and cross-checking for dp_m2_n2 · b95af8be
  Vandana Kannan authored Aug 05, 2014
  b95af8be
- drm/i915: Set M2_N2 registers during mode set · f769cd24
  Vandana Kannan authored Aug 05, 2014
  f769cd24
- Revert "drm/i915: Enable semaphores on BDW" · be71eabe
  Rodrigo Vivi authored Aug 04, 2014
  be71eabe
- drm/i915: read HEAD register back in init_ring_common() to enforce ordering · ece4a17d
  Jiri Kosina authored Aug 07, 2014
  ece4a17d
- drm/i915: Fix crash when failing to parse MIPI VBT · ed3b6679
  Rafael Barbalho authored Jul 24, 2014
  ed3b6679
Aug 07, 2014
- drm/i915: Bring GPU Freq to min while suspending. · 274fa1c1
  Deepak S authored Aug 05, 2014
  274fa1c1
- drm/i915: Fix DEIER and GTIER collecting for BDW. · 885ea5a8
  Rodrigo Vivi authored Aug 05, 2014
  885ea5a8
- drm/i915: Don't accumulate hangcheck score on forward progress · f260fe7b
  Mika Kuoppala authored Aug 05, 2014
  f260fe7b
- drm/i915: Add the WaCsStallBeforeStateCacheInvalidate:bdw workaround. · 02c9f7e3
  Kenneth Graunke authored Jan 27, 2014
  02c9f7e3
- drm/i915: Refactor Broadwell PIPE_CONTROL emission into a helper. · 884ceace
  Kenneth Graunke authored Jun 28, 2014
  884ceace
- drm/i915: Fix threshold for choosing 32 vs. 64 precisions for VLV DDL values · 69bbeb4a
  Ville Syrjälä authored Jun 28, 2014
  69bbeb4a
- drm/i915: Fix drain latency precision multipler for VLV · 22c5aee3
  Zhenyu Wang authored Feb 28, 2014
  22c5aee3
- drm/i915: Collect gtier properly on HSW. · 843db716
  Rodrigo Vivi authored Aug 01, 2014
  843db716