Commits · d57cd79db1a3c147b63fb0c64ccd26855eb8f86e · jan.koester / Linux · GitLab

Mar 31, 2021
- dt-bindings: phy: fix dt_binding_check warning in mediatek, ufs-phy.yaml · d57cd79d
  Seiya Wang authored Mar 19, 2021
  d57cd79d
- phy: zynqmp: Handle the clock enable/disable properly · 67097754
  Manish Narani authored Mar 24, 2021
  67097754
- dt-bindings: phy: bcm-ns-usb3-phy: convert to yaml · 5e15fdc3
  Rafał Miłecki authored Mar 29, 2021
  5e15fdc3
- dt-bindings: phy: bcm-ns-usb2-phy: convert to yaml · 3f3ec9b6
  Rafał Miłecki authored Mar 29, 2021
  3f3ec9b6
- phy: microchip: PHY_SPARX5_SERDES should depend on ARCH_SPARX5 · a113ef0a
  Geert Uytterhoeven authored Mar 31, 2021
  a113ef0a
- phy: cadence-torrent: Add delay for PIPE clock to be stable · b20da3c6
  Kishon Vijay Abraham I authored Mar 30, 2021
  b20da3c6
- phy: cadence-torrent: Explicitly request exclusive reset control · e0611d6d
  Kishon Vijay Abraham I authored Mar 30, 2021
  e0611d6d
- phy: cadence-torrent: Do not configure SERDES if it's already configured · b69d39f6
  Kishon Vijay Abraham I authored Mar 30, 2021
  b69d39f6
- phy: cadence-torrent: Group reset APIs and clock APIs · d44b4bf4
  Kishon Vijay Abraham I authored Mar 30, 2021
  d44b4bf4
- phy: ti: j721e-wiz: Do not configure wiz if its already configured · 725c7b8d
  Faiz Abbas authored Mar 30, 2021
  725c7b8d
- phy: cadence: Sierra: Enable pll_cmnlc and pll_cmnlc1 clocks · 1436ec30
  Kishon Vijay Abraham I authored Mar 19, 2021
  1436ec30
- phy: cadence: Sierra: Model PLL_CMNLC and PLL_CMNLC1 as clocks (mux clocks) · 28081b72
  Kishon Vijay Abraham I authored Mar 19, 2021
  28081b72
- dt-bindings: phy: phy-cadence-sierra: Add binding to model Sierra as clock provider · db7a3464
  Kishon Vijay Abraham I authored Mar 19, 2021
  db7a3464
- phy: cadence: Sierra: Add missing clk_disable_unprepare() in .remove callback · 29c2d02a
  Kishon Vijay Abraham I authored Mar 19, 2021
  29c2d02a
- phy: cadence: Sierra: Add array of input clocks in "struct cdns_sierra_phy" · a0c30cd7
  Kishon Vijay Abraham I authored Mar 19, 2021
  a0c30cd7
- phy: cadence-torrent: Use a common header file for Cadence SERDES · fd7abc3c
  Kishon Vijay Abraham I authored Mar 19, 2021
  fd7abc3c
- phy: cadence: Sierra: Explicitly request exclusive reset control · 15b0b82d
  Kishon Vijay Abraham I authored Mar 19, 2021
  15b0b82d
- phy: cadence: Sierra: Move all reset_control_get*() to a separate function · 1d5f40e0
  Kishon Vijay Abraham I authored Mar 19, 2021
  1d5f40e0
- phy: cadence: Sierra: Move all clk_get_*() to a separate function · 7e016cbc
  Kishon Vijay Abraham I authored Mar 19, 2021
  7e016cbc
- phy: ti: j721e-wiz: Get PHY properties only for "phy" or "link" subnode · 3fb95456
  Kishon Vijay Abraham I authored Mar 19, 2021
  3fb95456
- phy: cadence: Sierra: Create PHY only for "phy" or "link" sub-nodes · 03ada5a3
  Kishon Vijay Abraham I authored Mar 19, 2021
  03ada5a3
- phy: ti: j721e-wiz: Invoke wiz_init() before of_platform_device_create() · f7eb147d
  Kishon Vijay Abraham I authored Mar 19, 2021
  f7eb147d
- phy: cadence: Sierra: Fix PHY power_on sequence · 5b4f5757
  Kishon Vijay Abraham I authored Mar 19, 2021
  5b4f5757
Mar 30, 2021
- phy: qcom-qmp: add hbr3_hbr2 voltage and premphasis swing table · 3f2ec77c
  Kuogee Hsieh authored Mar 16, 2021
  3f2ec77c
- phy: ingenic: Fix a typo in ingenic_usb_phy_probe() · 446c200e
  Wei Yongjun authored Mar 05, 2021
  446c200e
- phy: ralink: phy-mt7621-pci: fix return value check in mt7621_pci_phy_probe() · b976c987
  Wei Yongjun authored Mar 05, 2021
  b976c987
- phy: marvell: ARMADA375_USBCLUSTER_PHY should not default to y, unconditionally · 6cb17707
  Geert Uytterhoeven authored Feb 08, 2021
  6cb17707
- phy: ti: j721e-wiz: add missing call to of_node_put() · f26fde36
  Yang Li authored Feb 25, 2021
  f26fde36
- phy: ralink: phy-mt7621-pci: fix XTAL bitmask · 982313c3
  Sergio Paracuellos authored Mar 02, 2021
  982313c3
- phy: cadence-torrent: Update PCIe + USB config for correct PLL1 clock · ed9e07f8
  Swapnil Jakhade authored Mar 04, 2021
  ed9e07f8
- phy: cadence-torrent: Update SGMII/QSGMII configuration specific to TI · 70901a7d
  Kishon Vijay Abraham I authored Mar 04, 2021
  70901a7d
- phy: ti: j721e-wiz: Add support for configuring QSGMII · 48820990
  Kishon Vijay Abraham I authored Mar 04, 2021
  48820990
- phy: cadence-torrent: Update PCIe + QSGMII config for correct PLL1 clock · e25c9dbc
  Swapnil Jakhade authored Mar 04, 2021
  e25c9dbc
- phy: cadence-torrent: Add support to drive refclk out · 2cca0228
  Kishon Vijay Abraham I authored Mar 10, 2021
  2cca0228
- phy: ti: j721e-wiz: Enable reference clock output in cmn_refclk_<p/m> · 9e405f87
  Kishon Vijay Abraham I authored Mar 10, 2021
  9e405f87
- phy: ti: j721e-wiz: Model the internal clocks without device tree input · 040cbe76
  Kishon Vijay Abraham I authored Mar 10, 2021
  040cbe76
- phy: ti: j721e-wiz: Configure full rate divider for AM64 · 6ecac2f8
  Kishon Vijay Abraham I authored Mar 10, 2021
  6ecac2f8
- phy: ti: j721e-wiz: Delete "clk_div_sel" clk provider during cleanup · 7e52a39f
  Kishon Vijay Abraham I authored Mar 10, 2021
  7e52a39f
- phy: ti: j721e-wiz: Remove "regmap_field" from wiz_clk_{mux|div}_sel · 549cb1ae
  Kishon Vijay Abraham I authored Mar 10, 2021
  549cb1ae
- devicetree/bindings: add support for CP110 UTMI PHY · b8900c53
  Konstantin Porotchkin authored Mar 07, 2021
  b8900c53